ASIC Verification Engineer

Verification Engineer position is your opportunity to join one of the industry’s leading companies in Smart Edge SoCs for network/systems control, management security systems, and IIoT.

You will be responsible for IP verification and work on industry-standard verification methodologies like UVM, Portable Stimulus and Formal verification flows. You will report to the Director of Engineering (Verification).

Job description:

Oversees definition, design, verification, and documentation for ASIC development. Determines architecture design, logic design, and system simulation.

Defines module interfaces/formats for simulation. Contributes to the development of multidimensional designs involving the layout of complex integrated circuits.

Evaluates all aspects of the process flow from high-level design to synthesis, place and route, and timing and power use.

Analyzes equipment to establish operation data, conducts experimental tests, and evaluates results. May also review vendor capability to support development.

5-10 years of experience

Skills and Education:-

• 5+ years of experience in UVM verification and UVM environment development (must have)
• Proficient in test plan definition and testcase development in C/Assembly/System Verilog
• Expertise in verifying design at RTL level and gate-level simulation
• Good understanding of coverage analysis, performance verification and use-case verification.
• Must have worked on AMBA AXI, AHB, APB protocol s
• Should have worked on verifying interface protocols like PCIe, DDR, DDR3/4, LPDDR, NVMe
• Experience in functional test vector development and post-silicon bring-up/debug.
• Fluency with scripting languages (e.g., Perl, Python, Shell); and
• Experience in working with repository management tools like Bitbucket/ Jenkins and bug tracking tools like JIRA.
• BE/BTECH or ME/MTECH degree in EE/EECS/CS or equivalent.

Please share your updated resume on [email protected]