ASIC/SoC Design & Verification Engineer | $70-$100 / hr

Apply here:
👉 https://neonlabshub.com/chip-design-verification-engineer.html

JobHub by NeonLabs, in partnership with Cincinnatus LLC, is seeking ASIC/SoC Design & Verification Engineers to support a leading AI lab's cutting-edge GenAI team at the core of the AI revolution.

This role focuses on designing realistic chip engineering problems, building reference RTL and testbenches, and evaluating AI models against complex hardware design and verification challenges.

You’ll work alongside a team of expert engineers—from PhD students to senior silicon veterans—helping shape how advanced AI models understand, reason about, and solve real-world hardware engineering workflows.
If you have hands-on experience chasing bugs across multiple blocks, architecting RTL from scratch, or driving a design through timing and coverage closure, this is a strong fit. We want your real-world judgment applied to our training systems.

⚙️ What You’ll Do
• Design and write up realistic chip engineering problems drawn from actual experience (not textbook exercises)
• Build full solutions including reference RTL, testbenches, and supporting materials using SystemVerilog/Verilog
• Run your problems against an AI model, evaluate where it succeeds or fails, and provide detailed explanations
• Collaborate with other engineers on the team to maintain a consistent bar of rigor and difficulty

🧠 Ideal Qualifications
• Hands-on ASIC/SoC design and/or functional verification experience (exposure to production silicon tapeout is highly preferred)
• Strong fluency in SystemVerilog/Verilog
• Experience with industry toolchains (e.g., Synopsys VCS, Cadence Xcelium, Siemens Questa, VC Formal, Verdi) and/or open-source counterparts
• Solid grasp of subsystem/SoC-level concerns (interface protocols, handshaking/backpressure, multiple clock domains, multi-module dataflow)
• Real depth in RTL design, IP integration (NoC, PCIe, DDR, ARM/AXI), functional/formal verification, PPA/timing optimization, analog/mixed-signal DV, or specification authoring
• Strong written communication and comfort working independently

🔬 Bonus Experience
• Taking silicon all the way to tapeout
• Past experience in AI training, model evaluation, or data annotation

💡 What Makes This Role Unique
• Work directly with one of the world’s leading AI labs
• Shape how next-generation AI models understand real hardware engineering work
• High-impact engineering work utilizing your real-world judgment and practical experience
• Welcoming to all experience levels (from new grads/PhD students to senior engineers) as long as you have done the actual work

💰 Details
• Pay: $70–$100/hour (USD)
• Type: W-2 Contingent Role | Remote
• Location Requirement: United States 🇺🇸
• Schedule: 20–40 hours/week (depending on your availability)
• Employer of Record: Cincinnatus LLC
• Placement: Embedded within a leading AI lab team

📋 Application Process
• Submit your resume via the link above
• Qualified candidates may move through technical evaluation and onboarding quickly
• Candidates must have confirmed availability with no scheduling conflicts
• Conduct an AI interview

Apply here:
👉 https://neonlabshub.com/chip-design-verification-engineer.html