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ASIC RTL design Engineer

๐Ÿ“ŒDuisburg, Germany ๐Ÿ‡ฉ๐Ÿ‡ช

โฑ๏ธŽ full-time

๐Ÿง™โ€โ™‚๏ธ mid-level

remote

  • Good knowledge on the digital concepts and ASIC flow
  • Experience in RTL coding and micro-architect
  • Must have hands on experience with SoC design and integration.
  • Experience in Verilog/System-Verilog is a must.
  • knowledge of AMBA protocols - AXI, AHB, APB
  • Basic knowledge on verification
  • Understanding of Memory controller designs and microprocessors is an added advantage
  • Experience in Synthesis / Understanding of timing concepts is a plus.
  • Excellent oral and written communications skills
  • Proactive, creative, curious, motivated to learn and contribute with good collaboration skills.
  • Remote working and Travel occasionally to customer location(Eindhoven )
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  • Employment

    โฑ๏ธŽ full-time

  • Experience

    ๐Ÿง™โ€โ™‚๏ธ mid-level

  • Working model

    remote

  • Skills
  • Industry
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