ASIC Design Engineer Apprenticeship Program

ASEM 

📍 Cyberjaya, Malaysia 🇲🇾

full-time
entry-level
Posted —

Key Skills

ASICRTLRISC-VVerilogSoC

Industry

SemiconductorAutomotive

Job Description

📍 Training Location:

• Chennai, India (10-Day International Training Experience)

• Cyberjaya, Malaysia (3 Weeks Hands-On Technical Training)


🕒 Duration: 1 Month Training + 3 Months On-the-Job Training (OJT)

📅 Start Date: June 2026

💼 Type: Full-Time Apprenticeship Program


About The Program

The ASIC Design Engineer Apprenticeship Program is designed for graduates who aspire to build a career in Application-Specific Integrated Circuit (ASIC) design, chip implementation, and end-to-end semiconductor product development.

Participants will undergo structured technical training in ASIC design flow, RTL-to-GDS concepts, and RISC-V-based system design, followed by industry-focused On-the-Job Training (OJT).


Program Structure During the 10-day training phase in Chennai, India, you'll gain exposure to: • ASIC design flow overview from specification to tape-out • Semiconductor industry ecosystem and chip development lifecycle • RISC-V based system design concepts • Industry lectures and design case studies • Engineering collaboration and technical exposure sessions In the 3-week hands-on training phase in Cyberjaya, Malaysia, you'll gain practical experience in: • RTL design implementation for ASIC flow • Design integration and module-level development • Functional simulation and debugging • Basic synthesis and design optimization concepts • ASIC-oriented design validation exercises


In the following 3 months, you'll gain hands-on industry experience through an On-the-Job Training (OJT) placement.


Responsibilities

As an ASIC Design Engineer Apprentice, you will work alongside experienced engineers and gain exposure to industry-standard ASIC development workflows such as:

• Developing RTL designs for ASIC implementation

• Supporting full ASIC design flow from concept to integration

• Performing functional simulation and debugging of design modules

• Assisting in synthesis and timing-aware design optimization

• Supporting system-level integration of SoC/ASIC components

• Collaborating with verification and physical design teams

• Participating in design reviews and technical validation activities

• Preparing ASIC design documentation and reports

• Supporting pre-tape-out readiness activities


Who We're Looking For

• Fresh graduates or final-year students in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or related disciplines

• Strong interest in ASIC Design, Semiconductor Development, or SoC Engineering

• Basic understanding of digital logic design and RTL concepts

• Exposure to Verilog/SystemVerilog is an advantage

• Strong problem-solving and analytical thinking skills

• Interest in end-to-end chip development lifecycle

• Able to commit to the full training and OJT duration

Why Join Us?

• Gain international training exposure in Chennai, India and Cyberjaya, Malaysia

• Receive a round-trip flight ticket , accommodation, and meals during the India training phase

• Earn allowance support throughout the program (subject to program terms and conditions)

• Learn RISC-V processor architecture and semiconductor design methodologies

• Receive mentorship from experienced industry professionals

• Build hands-on experience through practical training and OJT exposure

• Develop skills aligned with industry demand in Digital IC Design and Processor Development

• Expand your professional network within the semiconductor ecosystem

• Potential pathway towards semiconductor industry opportunities upon successful completion of the program