ASIC Chip Design Engineer
Mercor ↗
📍 United States, United States 🇺🇸
contract
senior
100
Expired
Posted —
This job posting has expired
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Key Skills
ASICRTLPowerSynthesisPython
Industry
SemiconductorAutomotive
Job Description
About The Job
Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark , General Catalyst , Peter Thiel , Adam D'Angelo , Larry Summers , and Jack Dorsey .
Position: ASIC Power Engineer
Type: Contract
Compensation: $100–$135/hour
Location: United States
Role Responsibilities
Must-Have
,
Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark , General Catalyst , Peter Thiel , Adam D'Angelo , Larry Summers , and Jack Dorsey .
Position: ASIC Power Engineer
Type: Contract
Compensation: $100–$135/hour
Location: United States
Role Responsibilities
- Perform PPA optimization with Fusion compiler to enhance ASIC efficiency.
- Conduct RTL and netlist level power analysis to improve power management.
- Execute post-processing and scripting on report log files for format conversion and data analysis.
- Setup, run, debug, and analyze reports of ASIC flows including Synthesis, PD, Power, and Timing.
- Implement blocks at RTL and UPF to optimize design processes.
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Document and communicate findings clearly to enhance team understanding.
Must-Have
- 10+ years of experience as an ASIC Power Engineer or CAD/Physical Design Engineer.
- Experience with power estimation tools and synthesis, including some physical design.
- Knowledge of power trade-offs in design and back end implementation.
- Hands-on experience in scripting and data analysis.
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Bachelor's degree in Electrical Engineering/Computer Science or equivalent experience.
- Experience with Synopsys (DC, ICC, PTPX/PrimePower, VCS, Verdi) and/or Cadence (Joules).
- Python, Perl (or similar) scripting and data-post-processing tools.
- Excel (or Matlab) for model fitting, data visualization, and analysis.
- Experience in low power design, tools, and methodologies including power intent UPF specifications.
- Silicon Power Characterization.
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Some power profiling experience at IP/SoC level.
- Upload resume
- AI interview based on your resume
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Submit form
- For details about the interview process and platform information, please check: https://talent.docs.mercor.com/welcome/welcome
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For any help or support, reach out to: [email protected]
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Key Skills
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