Sr. Digital/FPGA Design Engineer
豪威集团 ↗
📍 Shanghai, China 🇨🇳
full-time
senior
Expired
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Key Skills
FPGARTLASICPLLDDR
Industry
SemiconductorConsumer Electronics
Job Description
该职位来源于猎聘 职责描述：
- Responsible for FPGA RTL design, simulation and on board verification.
- Responsible for frontend digital design for ASIC chips.
- Participate in architecture definition, test and maintenance of verification platform.
- Assist embedded FW development for SOC architecture 任职要求：
- Skillful FPGA RTL design is required. Good knowledge of digital design and system design.
- Be experienced in FPGA IP using, such as PLL, DDR controller, transceiver.
- Strong analytical, and problem solving skills as well as hands-on lab debugging skills.
- Have a good knowledge of timing analysis.
- Strong analytical, and problem solving skills as well as hands-on lab debugging skills.
- Good communication skills, especially in technical writing and reporting. 7. 3 years+ working experience in digital design
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Key Skills
FPGARTLASICPLLDDR
Industry
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