Job Title: SoC Design Verification Engineer
Location: San Jose, CA
Job Description
We are looking for a highly skilled SoC/Performance DV engineer to drive system-level validation and performance characterization of complex SoCs. The role involves working closely with architecture, design, and software teams to ensure silicon meets performance, power, and functionality targets.
Key Responsibilities
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Develop and execute SoC-level validation and performance verification strategy
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Build system-level testbenches, workloads, and performance models
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Analyze performance bottlenecks across CPU, memory, interconnect, and accelerators
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Perform power and performance trade-off analysis
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Collaborate with architecture, RTL, and software teams
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Debug issues at system level (HW + FW/SW interaction)
Required Skills
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Strong experience in SoC-level DV / Performance validation
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Understanding of CPU architecture, memory hierarchy, NoC/interconnect
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Expertise in SystemVerilog/UVM + C/C++/Python
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Experience with performance profiling tools
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Strong debugging and analytical skills
Good To Have
Experience in post-silicon validation / bring-up
Knowledge of AI/ML or high-performance computing workloads