Senior Staff ASIC Verification Engineer

We are looking for a highly experienced Senior Staff ASIC Verification Engineer to lead the verification of complex digital designs. The ideal candidate will have deep expertise in advanced verification methodologies, strong leadership skills, and a proven track record of successfully verifying sophisticated SoCs/ASICs from concept to silicon.

Key Responsibilities

• Oversee complete verification lifecycle for complex digital IP and subsystems
• Develop and deploy robust verification strategies and detailed test plans
• Led the design of sophisticated UVM testbench architectures
• Develop and execute comprehensive verification plans for block‑level, subsystem‑level, and full‑chip ASIC designs.
• Architect and implement UVM‑based verification environments, including testbenches, sequences, scoreboards, and coverage models.
• Create and maintain constrained‑random and directed test suites to validate functionality, performance, and corner‑case behaviour.
• Drive functional coverage closure and ensure verification completeness through metrics‑driven methodologies.
• Debug RTL, testbench, and simulation issues using industry‑standard tools and waveforms.
• Collaborate closely with RTL designers, architects, and cross‑functional teams to review specifications, identify verification gaps, and resolve design issues.
• Support gate‑level simulations, low‑power verification (UPF), and mixed‑signal verification as needed.
• Participate in code reviews, design reviews, and continuous improvement of verification methodologies and flows.

Required Qualifications

• BS in Electrical Engineering, Computer Engineering, or related field with 10 years of ASIC/SoC verification experience; MS or PHD preferred.
• Strong expertise in SystemVerilog, UVM, and modern verification methodologies.
• Solid understanding of digital design fundamentals, RTL, and ASIC development flows.
• Hands‑on experience with simulation tools (e.g., Synopsys VCS, Questa, Xcelium) and waveform debugging.
• Proficiency in scripting languages such as Python, Perl, TCL, or Shell for automation.
• Experience with functional coverage, assertions (SVA), and constrained‑random verification.
• Familiarity with protocols such as AMBA (AXI/AHB/APB), PCIe, DDR, or similar on‑chip interfaces.