Senior FPGA Engineer

Overview of Role

The Senior FPGA Engineer plays an integral role in architecting and developing our next generation of navigation and robotics products, with an acute focus on sensor development and digital signal processing. This senior technical role centers on the design, implementation, and verification of complex FPGA hardware configurations, while actively participating in embedded software development.

Roles and responsibilities: 

• FPGA Mastery: Maintain expert-level proficiency in FPGA architecture, hardware description languages (HDLs), vendor toolchains, and modern verification methodologies.
• Embedded Software Integration: Maintain a high level of proficiency in embedded software development (languages, tools, and real-time operating systems) to ensure seamless hardware/software co-design.
• Robust Architecture: Design performant, low-latency, and deterministic FPGA configurations that are highly testable, maintainable, and compliant with stringent system requirements.
• Defect Resolution: Rapidly diagnose, root-cause, and resolve complex hardware/software defects using advanced debugging techniques and simulation tools.
• Documentation: Author clear, comprehensive technical documentation including architectural specifications, requirements traceability, and test plans/results.
• Technology Scouting: Keep abreast of the evolving state-of-the-art in FPGA technologies, SoC architectures, & agile hardware development methodologies to maintain the company’s competitive edge.
• Autonomy & Ownership: Highly self-directed; effectively prioritizes competing tasks and manages resources to deliver complex deliverables on schedule without requiring micro-management.
• Operates with a solution-oriented mindset, maintaining momentum, productivity, and positive energy when tackling complex, ambiguous, or high-pressure engineering challenges.

Qualifications & Experience

• Education: Bachelor of Engineering (Electrical/Electronic, Computer Systems, or Mechatronics) or equivalent professional qualification.
• Experience: 8+ years of commercial FPGA development experience, including large-scale, high-reliability system deployments.
• Vendor Ecosystems: Proven hands-on experience with both AMD/Xilinx (Vivado) and Intel/Altera (Quartus) toolchains and device architectures.
• Advanced VHDL/Verilog Proficiency: Deep expertise in hardware description languages, specifically including:
• Advanced timing constraints (SDC/XDC), timing analysis, and achieving timing closure on high-utilization designs.
• Hardware-in-the-loop debug techniques (e.g., ChipScope/ILA, SignalTap).
• Safe clock domain crossing (CDC) practices in complex, multiclock domain architectures.
• Clock management and distribution utilizing on-chip PLLs/MMCMs.
• Fixed-point and floating-point digital signal processing (DSP) implementation.
• Electrical Hardware Interface Expertise:
• High-speed memory and digital interfaces (e.g., DDR3/DDR4, PCIe, LPDDR, gigabit transceivers).
• Physical/electrical communication layers (differential signaling, LVDS, termination strategies).
• Low-level communication protocols (SPI, I2C, UART, CAN).
• Knowledge of PCB constraints regarding FPGA pin layout, signal grouping, and differential pair limitations.
• Embedded Software: Strong proficiency in C for bare-metal or RTOS embedded applications.

Preferred Criteria

• Proficiency in C++ for object-oriented embedded software development.
• Familiarity with higher-level languages for automation, modeling, and scripting (Python, MATLAB, Bash).
• A strong background in physics and mathematics (specifically linear algebra and kalman filtering concepts).
• An understanding of optics and optoelectronics as they pertain to high-precision instrumentation (e.g., Fiber Optic Gyroscopes).
• Familiarity with modern software/hardware verification frameworks (e.g., UVVM, OSVVM, or UVM).
• Comprehensive knowledge of Work Health and Safety (WHS/HSE) practices within a laboratory or manufacturing environment.