Senior EEG Hardware & Firmware Engineer

Senior EEG Systems Validation Engineer

EEG Hardware, Firmware & Signal Acquisition Quality

Location: Bangalore, on-site

Employment Type: Full-Time

Experience: 3+ Years (hardware/firmware/signal acquisition validation, not research-only)

Start Date: Immediate Joiners Preferred

1. Job Title

Senior EEG Systems Validation Engineer

2. Role Summary

Company Description:

Basil Health AI is developing neuro-wellness technology that integrates ancient wisdom, modern neuroscience, and AI-driven personalization to help individuals better understand and improve their mental well-being. The company focuses on making mental wellness measurable, personalized, and actionable through evidence-based mental optimization tools. Basil Health AI is also innovating a Web3-enabled engagement layer that uses a utility token to reward real mental progress and support community-driven growth. Its technology has been tested with major organizations and is supported by researchers from leading institutions, including IIT Kanpur, IIT Mandi, the University of Maryland, and Michigan State University. Basil Health AI collaborates globally with corporates, healthcare providers, research institutions, wellness retreats, and NGOs to advance mental wellness and cognitive health.

We are hiring a hands-on engineer to independently evaluate, validate, and troubleshoot EEG acquisition systems — both commercial devices and custom-built hardware. This is an engineering and quality-validation role centered on the full EEG acquisition chain: electrodes, analog front end, ADC, firmware, embedded data pipeline, wireless streaming, and signal integrity at the hardware level.

This role is explicitly NOT a neuroscience research or EEG machine-learning position. Instead, the focus is on whether a device is built and behaving correctly: is the analog design sound, is the firmware acquiring data faithfully, is the signal clean enough to trust, and — when it isn't — is the root cause hardware, firmware, electrode/placement, physiological, or environmental.

The ideal candidate can take a newly purchased or newly built EEG system, inspect its datasheets and raw output, run a structured validation protocol, and issue a clear engineering verdict: approve for use, flag specific defects, or recommend redesign.

3. Key Responsibilities

• Independently evaluate commercial and custom EEG hardware against datasheet claims and industry benchmarks.
• Review and stress-test analog front end (AFE) design: instrumentation amplifier stage, gain, bandwidth, CMRR, input impedance, and noise floor.
• Assess ADC specifications (resolution, dynamic range, sampling rate) for suitability to EEG signal amplitudes and bandwidths.
• Validate firmware behavior: correct sampling, buffering, timestamping, DMA handling, and packet integrity over SPI/I2C/BLE.
• Verify multi-channel and multi-device synchronization accuracy and identify timing drift or dropped samples.
• Design and execute bench-level validation experiments using phantoms, signal generators, and reference electrodes.
• Measure and interpret raw signal quality: noise floor, line interference, baseline drift, amplifier saturation, ADC clipping.
• Diagnose the root cause of anomalies in raw EEG traces — distinguishing hardware faults, firmware bugs, electrode/placement issues, and physiological artifacts (EOG, EMG, ECG, motion).
• Assess grounding, shielding, isolation, and power management design for common-mode noise rejection and electrical safety.
• Communicate directly with hardware vendors on technical discrepancies, spec clarifications, and requested fixes.
• Recommend concrete hardware and firmware improvements based on validation findings.
• Prepare structured technical validation reports with pass/fail criteria, evidence, and deployment recommendations.
• Build repeatable validation protocols and regression checks so future hardware/firmware revisions can be re-verified quickly.
• Partner with research and product teams to translate acquisition-quality findings into go/no-go deployment decisions.

4. Required Technical Skills

• Solid understanding of EEG hardware architecture end-to-end: electrode → AFE → ADC → MCU → wireless/USB → host.
• Working knowledge of electrode technologies — wet vs. dry, active vs. passive — and their tradeoffs in impedance and noise.
• Practical familiarity with the 10–20 (and 10–10) placement systems, reference/ground electrode conventions, and DRL (driven right leg) circuits.
• Ability to read and critically assess analog front end and instrumentation amplifier datasheets.
• Understanding of ADC tradeoffs: bit resolution, dynamic range, oversampling, and their effect on usable EEG resolution (µV-level signals).
• Comfort with core analog metrics: input impedance, CMRR, amplifier noise (µVrms/√Hz), gain stability, bandwidth.
• Experience reviewing or writing embedded firmware for signal acquisition (C/C++), including buffering and timestamping logic.
• Practical exposure to embedded platforms and protocols: ARM MCUs, SPI, I2C, BLE, DMA.
• Understanding of wireless EEG streaming reliability: packet loss, latency, throughput under real-world conditions.
• PCB-level awareness of grounding, shielding, isolation barriers, and power supply design as they affect signal quality.
• Working knowledge of electrical safety requirements for body-worn/medical instrumentation.
• Solid grounding in sampling theory, aliasing, and digital filter design (notch, band-pass, high-pass) for acquisition-quality purposes.
• Ability to use PSD/FFT as a diagnostic tool for line noise, drift, and bandwidth issues — not for advanced feature extraction.
• Strong practical skill in visually and quantitatively identifying artifacts in raw EEG: blink/EOG, eye movement, EMG, ECG, motion, electrode pop, cable movement, saturation, clipping, common-mode noise, line interference.

5. Preferred Qualifications

• Bachelor's or Master's in Biomedical Engineering, Electrical/Electronics Engineering, Embedded Systems, or related field.
• Prior experience validating or bringing up medical or wearable biosignal hardware (EEG, ECG, EMG, or similar).
• Experience working directly with EEG hardware vendors (e.g., spec review, RMA/defect escalation, firmware update cycles).
• Exposure to regulatory/quality frameworks such as IEC 60601-1, IEC 62304, or ISO 14971 (not mandatory, but a plus).
• Experience building or supporting validation/QA protocols and test benches for hardware products.
• Familiarity with PCB design tools (Altium, KiCad, Eagle) sufficient to read schematics and layouts critically.

6. Practical Hands-on Experience Expected

• Has physically set up EEG (or comparable biosignal) hardware, applied electrodes, and captured usable recordings.
• Has used bench equipment — oscilloscope, function generator, impedance meter, multimeter — to characterize a signal chain.
• Has debugged an embedded firmware issue affecting data acquisition (dropped samples, timing drift, buffer overflow, etc.).
• Has diagnosed a real signal-quality problem in raw physiological data and traced it to a specific root cause.
• Has written or contributed to a formal hardware/firmware validation or test report used for a go/no-go decision.
• Has interacted with a hardware vendor to resolve a technical discrepancy or defect.

7. Tools, Platforms, and Hardware Experience

• Bench instrumentation: oscilloscope, function/signal generator, impedance meter, multimeter, logic analyzer.
• EEG phantoms / signal simulators for controlled bench validation.
• Commercial EEG systems exposure (any of): OpenBCI, g.tec, Brain Products, ANT Neuro, Emotiv, Neuroelectrics, or equivalent.
• Embedded development boards/platforms: STM32, nRF52, ESP32, or similar ARM-based MCUs.
• Protocol-level tooling for SPI/I2C/BLE inspection and debugging.
• Python (NumPy, SciPy, MNE for data I/O and plotting) and/or MATLAB for raw-signal inspection and QC scripting.
• Version control (Git) for firmware and validation-script tracking.
• PCB design/review tools (Altium, KiCad) at a schematic-reading level.

8. Required Knowledge Areas

• EEG hardware architecture and signal chain design.
• Electrode technologies and 10–20 placement, reference/ground/DRL conventions.
• Analog Front End (AFE) design and instrumentation amplifier behavior.
• ADC characteristics: resolution, dynamic range, sampling rate.
• Input impedance, CMRR, amplifier noise, gain, bandwidth.
• Firmware for EEG acquisition and embedded systems (ARM, SPI, I2C, BLE, DMA, buffering, timestamps, synchronization).
• Wireless EEG streaming.
• PCB grounding, shielding, isolation, and power management.
• Electrical safety for body-worn/medical devices.
• Sampling theory, aliasing, digital filtering, and PSD/FFT for acquisition-quality assessment only.