SOC DFT Engineer
๐Hefei, China ๐จ๐ณ
โฑ๏ธ full-time
๐งโโ๏ธ mid-level
- Responsible for SOC chip-level and sub-system level DFT architecture definition, scan insertion, scan timing constraint, ATPG pattern generation/simulation, ATPG post-silicon diagnosis, MP support and etc.
- Support chip-level/sub-system DFT related check and implementation, including ATPG DRC, ATPG coverage improve, ATPG pattern count reduction, Equivalence check, Scan SDC constraint, Timing Sign-off, Timing ECO, Power Analysis, and other scan related performance/power/area quality boost, etc.
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Support SOC physical implementation for DFT part, and support TE for MP issue.
- MSEE degree or above in microelectronics, computer, electronic engineering, communication engineering and other related fields
- Familiar with Verilog and ASIC front-end design flow, with solid digital circuit theory foundation, hands-on ability and innovation ability.
- Professional in IC front-end EDA tools (such as Sypglass/DC/PT/LEC/VCS and Tessent/DFTMAX/TMAX platforms), and with ASIC design experience, such as: RTL coding, Synthesis, P&R, STA timing signoff, IR Analysis, Post-silicon diagnosis and etc.
- Familiar with scripting language, such as Makefile/Tcl/Perl/Python, and etc.
- Good communication and team-work skills, good English communication and presentation experience.
- Passion work attitude, full of curiosity about technology, courage to take responsibility, and able to work under strong pressure.
Senior Embedded Software Engineer
@ Embedd 
What we're looking for
At embedd.it, we power hardware-software integration in embedded devices. We turn fragmented semiconductor chip data into configurable digital twins, then deterministically generate code, tests, and documentation โ making integration faster, cheaper, and resilient to supply chain shocks.
Weโre looking for a true legend โ someone with abstract thinking and deep expertise in low-level software development. Youโll build vendor-agnostic tooling for MCU and peripheral integration to solve hardware-software integration once and for all. We work at the intersection of embedded systems, code generation, compilers, and machine learning. Itโs your chance to help redefine how low-level development is done.
Responsibilities
- Drive the architecture of the driver structures and system layout
- Define scalable patterns for cross-architectural integration across bare-metal, Zephyr, Linux, and other environments
- Deconstruct complex SoC device trees and translate hardware descriptions into structured internal models for automated reasoning
- Partner with the ML team to shape data and annotation models for AI-driven data-extraction tooling
Qualifications
- 5+ years of experience in embedded systems development, including bare-metal and RTOS-based systems
- Proficiency in C/C++
- Familiarity with firmware configuration, SoC bring-up, and system-level debugging
- Hands-on experience with code generation tools, or low-level compiler/decompiler/emulator technologies
- Strong background in embedded toolchains: compilers, linkers, debuggers, and build systems
- Python or scripting for automation and tooling is a plus
- Experience with functional-safety standards is a plus
Why embedd.it?
- Dynamic, venture-backed team of engineers challenging the status quo ๐
- Work at the intersection of embedded systems, code generators, compilers, and ML ๐ค
- Unusual challenges requiring out-of-the-box abstract thinking ๐ง
- Competitive compensation: cash + equity ๐ฐ
- Remote work possible ๐
About Us
embedd.it is a UK-based startup reinventing embedded development. Our platform transforms unstructured semiconductor data into structured digital twins, enabling automatic generation of drivers, tests, and documentation. We're building a single, traceable source of truth to make integration fast, vendor-agnostic, and future-proof.
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Employment
โฑ๏ธ full-time
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Experience
๐งโโ๏ธ mid-level
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Skills
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Industry
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