RTL Design & Verification Engineer

Job Requirements

Job Description

Who We Are

Quest Global delivers world-class end-to-end engineering solutions by leveraging our deep industry knowledge and digital expertise. By bringing together technologies and industries, alongside the contributions of diverse individuals and their areas of expertise, we are able to solve problems better, faster. This multi-dimensional approach enables us to solve the most critical and large-scale challenges across the aerospace & defense, automotive, energy, hi-tech, healthcare, medical devices, rail and semiconductor industries.

We are looking for humble geniuses, who believe that engineering has the potential to make the impossible possible; innovators, who are not only inspired by technology and innovation, but also perpetually driven to design, develop, and test as a trusted partner for Fortune 500 customers. As a team of remarkably diverse engineers, we recognize that what we are really engineering is a brighter future for us all. If you want to contribute to meaningful work and be part of an organization that truly believes when you win, we all win, and when you fail, we all learn, then we’re eager to hear from you. The achievers and courageous challenge-crushers we seek, have the following characteristics and skills

What You Will Do

RTL Design and Verification: Run power tests on RTL designs and verify that the test behavior matches the intent.

• Power Profiling: Utilize tools such as PPRTL or PTPX to perform comprehensive power profiling of hardware designs, identifying power-intensive areas and opportunities for optimization. Correlate various hardware events/telemetry with power profiles to understand power consumption.
• Data Processing and Automation: Develop and implement basic Python and/or TCL scripts for automation, data extraction, and processing of large volumes of hardware design data.
• Analysis and Reporting: Analyze profiling data, generate reports, and present findings to the design team, offering insights and recommendations for power reduction.
• Collaboration: Work closely with architects and designers to understand the power profile of the IP block and build a runtime power model using ML techniques.
  
  

What You Will Bring

• Strong background in RTL design and verification principles.
• Demonstrable experience with power profiling tools such as PPRTL or PTPX.
• Proficiency in scripting languages like Python and/or TCL for automation and data manipulation.
• Ability to process and analyze large datasets related to hardware design.
• Familiarity with machine learning models and their application in hardware design optimization is a plus.
  
  

Pay Range : $100,000 to $120,000

Compensation decisions are made based on factors including experience, skills, education, and other job-related factors, in accordance with our internal pay structure. We also offer a comprehensive benefits package, including health insurance, paid time off, and retirement plan.

Work Requirements

This role is considered an on-site position located in Sunnyvale, CA

You must be able to commute to and from the location with your own transportation arrangements to meet the required working hours.

Benefits

• 401(k) matching
• Dental insurance
• Health insurance
• Paid time off
• Vision insurance
• Employer paid Life Insurance, Short- & Long-Term Disability