RTL Design Engineer

Apple 

📍 California, United States 🇺🇸

full-time
senior
181100
Expired
Posted —
This job posting has expired View All RTL Design Engineer Jobs

Key Skills

SystemVerilogAMBACDCRDCASIC

Industry

SemiconductorConsumer Electronics

Job Description

Summary

Come and join Apple’s growing wireless silicon development team. Our wireless SoC organization is responsible for all aspects of wireless silicon development, emphasizing highly energy-efficient design and new technologies that transform the user experience at the product level. All of this is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. If you enjoy a fast-paced and challenging environment, collaborate with people across different functional areas, and thrive during crisis times, we encourage you to apply.

Description

In this role you will work on a small team dedicated to IP architecture, design, and verification. As a member of the team you will be asked to architect and design new modules while working with multiple cross-functional teams including: Design Integration, Platform Architecture, Software Engineering, DFT, and Debug. You will write formal verification to prove the designs (when feasible). All designs will be written in SystemVerilog and will use SV simulations and SVA formal verification environments. You will run quality checkers (lint, CDC, RDC) and be expected to provide constraints and waivers when necessary. You will be asked to support the DV simulation team and the bring-up teams with the usage of new IP modules. All new designs are required to have documentation, example code (where relevant), and integration notes. Expect to give presentations to cross-functional teams on the new IP designs.

Minimum Qualifications

BS and a minimum of 10 years relevant industry experiencenFluency in RTL design using SystemVerilognExperience designing for one or more AMBA protocols - AHB, AXI, APBnWorking knowledge of synthesis and static timing analysisnComfortable with clock domain crossings as well as CDC/RDC checking tools

Preferred Qualifications

Fluency in SystemVerilog AssertionsnBackground in low power designnUnderstanding of embedded software designnExperience in diagramming architectures and presenting designs to integration/software teams

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $181,100 and $318,400, and your base pay will depend on your skills, qualifications, experience, and location.u003cbru003eu003cbru003eApple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. u003ca href='https://www.apple.com/careers/us/benefits.html' target='_blank' aria-label='Learn more about Apple Benefits (Opens in new window)'u003eLearn more about Apple Benefits.u003cspan class='icon icon-after icon-external' aria-hidden='true'u003eu003c/spanu003eu003c/au003eu003cbru003eu003cbru003eNote: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.u003cbru003e