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JMD

PCB & Substrate Layout Engineer

JMD

📍 United States, United States 🇺🇸

contract
senior
85
remote
Posted —

Key Skills

CadenceSubstrateHDIFPGAPackaging

Industry

AerospaceDefense

Job Description

Title: Principal PCB & Substrate Layout Engineer (Cadence APD+)

Location: Remote

Employment Type: Contract (6+ Months)

Status: Accepting Candidates


About the Role

We are seeking a Principal PCB & Substrate Layout Engineer with deep expertise in advanced substrate development and Cadence APD+.

This position will focus on the design and development of complex high-density substrates, advanced packaging technologies, FPGA packaging solutions, and next-generation electronic assemblies supporting aerospace and defense applications.

The ideal candidate possesses extensive experience with Cadence APD+, substrate design rules, HDI technologies, and advanced packaging methodologies.


Key Responsibilities

  • Substrate Development & Layout
  • Develop advanced substrate layouts utilizing Cadence APD+
  • Design high-density interconnect (HDI) substrates
  • Create complex package layouts supporting advanced electronic systems
  • Support advanced packaging initiatives including 2.5D and stacked package technologies
  • Advanced Packaging Design
  • Design and develop:
  • Interposers
  • Substrates
  • Flip-Chip Packages
  • Die Stacking
  • Package Stacking
  • Substrate Stacking
  • Support high-performance package architectures
  • Implement advanced packaging methodologies for complex products
  • Constraint Management & Design Rules
  • Utilize Cadence APD+ Physical Constraint Editor
  • Utilize Cadence APD+ Electrical Constraint Editor
  • Develop and maintain substrate design rules
  • Ensure compliance with manufacturing and assembly requirements
  • HDI & High-Speed Design
  • Design HDI stack-ups incorporating:
  • Blind Vias
  • Buried Vias
  • Microvias
  • Support fine-line routing requirements
  • Optimize layouts for:
  • Signal Integrity
  • Power Integrity
  • Manufacturability
  • Manufacturing Support
  • Generate fabrication and assembly documentation
  • Validate manufacturing data using CAM tools
  • Collaborate with fabrication vendors and manufacturing teams
  • Support design reviews and technical assessments
  • Cross-Functional Collaboration
  • Partner with:
  • Electrical Engineering
  • Mechanical Engineering
  • Manufacturing Engineering
  • Support 3D package modeling and fit-check activities
  • Participate in thermal and mechanical design reviews


Qualifications

  • Bachelor's Degree in Engineering or equivalent experience
  • 10+ years of PCB and/or Substrate Layout experience
  • Expert-level experience with:
  • Cadence APD+
  • Advanced Package Designer
  • Extensive experience with:
  • Substrate Development
  • Substrate Design Rules
  • HDI Technologies
  • Experience with:
  • FPGA Package Design
  • Package Layout
  • High-Speed Designs
  • Strong understanding of:
  • Digital Layout
  • Analog Layout
  • RF Layout Techniques


Preferred Qualifications

  • 2.5D Packaging
  • Interposer Design
  • Flip-Chip Packaging
  • Die Stacking
  • Package Stacking
  • Substrate Stacking
  • CAM350
  • BluePrint
  • RF Packaging
  • Thermal Modeling Collaboration
  • Aerospace & Defense Experience


Industry Standards

  • Experience with:
  • IPC Standards
  • EDEC Standards
  • Fabrication Specifications
  • Assembly Specifications
  • Electronic Packaging Standards


Compensation

  • $85-$90/hr W2
  • 6+ Month Contract
  • Location: Phoenix, AZ