Title: Principal PCB & Substrate Layout Engineer (Cadence APD+)
Location: Remote
Employment Type: Contract (6+ Months)
Status: Accepting Candidates
About the Role
We are seeking a
Principal PCB & Substrate Layout Engineer
with deep expertise in advanced substrate development and Cadence APD+.
This position will focus on the design and development of complex high-density substrates, advanced packaging technologies, FPGA packaging solutions, and next-generation electronic assemblies supporting aerospace and defense applications.
The ideal candidate possesses extensive experience with Cadence APD+, substrate design rules, HDI technologies, and advanced packaging methodologies.
Key Responsibilities
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Substrate Development & Layout
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Develop advanced substrate layouts utilizing Cadence APD+
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Design high-density interconnect (HDI) substrates
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Create complex package layouts supporting advanced electronic systems
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Support advanced packaging initiatives including 2.5D and stacked package technologies
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Advanced Packaging Design
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Design and develop:
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Interposers
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Substrates
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Flip-Chip Packages
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Die Stacking
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Package Stacking
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Substrate Stacking
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Support high-performance package architectures
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Implement advanced packaging methodologies for complex products
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Constraint Management & Design Rules
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Utilize Cadence APD+ Physical Constraint Editor
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Utilize Cadence APD+ Electrical Constraint Editor
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Develop and maintain substrate design rules
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Ensure compliance with manufacturing and assembly requirements
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HDI & High-Speed Design
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Design HDI stack-ups incorporating:
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Blind Vias
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Buried Vias
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Microvias
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Support fine-line routing requirements
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Optimize layouts for:
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Signal Integrity
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Power Integrity
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Manufacturability
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Manufacturing Support
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Generate fabrication and assembly documentation
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Validate manufacturing data using CAM tools
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Collaborate with fabrication vendors and manufacturing teams
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Support design reviews and technical assessments
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Cross-Functional Collaboration
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Partner with:
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Electrical Engineering
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Mechanical Engineering
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Manufacturing Engineering
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Support 3D package modeling and fit-check activities
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Participate in thermal and mechanical design reviews
Qualifications
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Bachelor's Degree in Engineering or equivalent experience
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10+ years of PCB and/or Substrate Layout experience
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Expert-level experience with:
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Cadence APD+
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Advanced Package Designer
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Extensive experience with:
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Substrate Development
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Substrate Design Rules
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HDI Technologies
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Experience with:
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FPGA Package Design
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Package Layout
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High-Speed Designs
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Strong understanding of:
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Digital Layout
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Analog Layout
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RF Layout Techniques
Preferred Qualifications
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2.5D Packaging
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Interposer Design
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Flip-Chip Packaging
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Die Stacking
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Package Stacking
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Substrate Stacking
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CAM350
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BluePrint
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RF Packaging
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Thermal Modeling Collaboration
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Aerospace & Defense Experience
Industry Standards
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Experience with:
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IPC Standards
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EDEC Standards
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Fabrication Specifications
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Assembly Specifications
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Electronic Packaging Standards
Compensation
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$85-$90/hr W2
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6+ Month Contract
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Location: Phoenix, AZ