IP Pixel RTL Design Engineer

Summary

Taking a picture with an iPhone is an amazing experience. Taking a part in developing the next generation is even more.nnThe HDC pixel group is working on Apple ISP (Image Signal Processing) IP development. The group implements highly complex cutting-edge image processing technologies, putting emphasis on quality and security, while meeting aggressive area and power constraints.

Description

In this role you'll participate in the architecture of next generations of Apple ISP, handle RTL implementation of the micro-architecture, participate in clearly defining specification, testing and verification of the designs. You will work in collaboration with CAD u0026 PD teams to implement RTL design into GDS, run various flows and provide guidelines to other designers and participate in establishing CAD and design methodologies for correct by construction designs.nnAt Apple, we’re not all the same. And that’s our greatest strength. We draw on the differences in who we are, what we’ve experienced, and how we think. Because to create products that serve everyone, we believe in including everyone. Therefore, we are committed to treating all applicants fairly and equally. We will work with applicants to make any reasonable accommodations.

Minimum Qualifications

6+ years of Logic Design experience.nAdvanced knowledge of ASIC RTL design methodologiesnAdvanced knowledge of standard ASIC verification flows including simulation and testbench development.nWorking knowledge of frontend tools (Synthesis, STA, etc’)nExcellent knowledge of System Verilog, Verilog.nGood knowledge of C / C++.nExperience with either Python/Perl/Tcl scripts.nKnowledge of industry standard interfaces and experience with multiple frontend simulators/debuggers.nA teammate with excellent interpersonal skills and the desire to pursue diverse challenges.

Preferred Qualifications

BS.c / MS.c EE or BS.c / MS.c CE.nHands-on experience with signal processing design.nKnowledge of formal verification u0026 methodologies.