IC Design Verification Engineer_Hsinchu/Taipei

Job Description

Co-work with algorithm, digital/analog design, firmware, AI tool teams.

0+ ~ 10+ Years Experience in:

Agentic AI Workflow/Tool Evaluation/Deployment

Data Center & High-Speed SerDes Design Verification Plan & Project Execution

Automotive Design Verification Plan & Project Execution

5G/6G Wireless Communication Design Verification Plan & Project Execution

Satellite/NTN Communication Design Verification Plan & Project Execution

Processor Platform/Peripherals Design Verification Plan & Project Execution

Subsystem / System Level Design Verification Plan & Project Execution

Requirement

• Must be proficient in at least one of the following programming languages: Verilog / System Verilog / C++ / Python.
• Must have continuous improvement / innovation / teamwork mindsets.
• Good at debug ability / problem-solving / issue analysis.
  
  

[Optional]

• Experience with UVM (Universal Verification Methodology).
• Experience with assertion and formal verification.
• Experience with IC design flow, logic design, and computer architecture.
• Experience with platform (e.g., bus, clock, power, reset, dma, etc).
• Experience with mixed signal design and verification.
• Experience with communication system and signal processing.
• Experience with subsystem / chip level verification.
• Experience with well-organized and comprehensive verification planning.
• Experience with verification methodology.
• Experience with technical management, project management, and team/people management.