Job Description
Co-work with algorithm, digital/analog design, firmware, AI tool teams. 0+ ~ 10+ Years Experience in: Agentic AI Workflow/Tool Evaluation/Deployment Data Center & High-Speed SerDes Design Verification Plan & Project Execution Automotive Design Verification Plan & Project Execution 5G/6G Wireless Communication Design Verification Plan & Project Execution Satellite/NTN Communication Design Verification Plan & Project Execution Processor Platform/Peripherals Design Verification Plan & Project Execution Subsystem / System Level Design Verification Plan & Project Execution
Main Requirements and Qualifications
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01. Must be proficient in at least one of the following programming languages: Verilog / System Verilog / C++ / Python.
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02. Must have continuous improvement / innovation / teamwork mindsets.
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03. Good at debug ability / problem-solving / issue analysis.
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[Optional]
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01. Experience with UVM (Universal Verification Methodology).
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02. Experience with assertion and formal verification.
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03. Experience with IC design flow, logic design, and computer architecture.
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04. Experience with platform (e.g., bus, clock, power, reset, dma, etc).
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05. Experience with mixed signal design and verification.
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06. Experience with communication system and signal processing.
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07. Experience with subsystem / chip level verification.
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08. Experience with well-organized and comprehensive verification planning.
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09. Experience with verification methodology.
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10. Experience with technical management, project management, and team/people management.