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AMD

GPU Design Verification Engineer

📌Santa Clara, United States 🇺🇸

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⏱︎ full-time

🧙‍♂️ mid-level

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.

AMD together we advance_

The Role

We are looking for a GPU Design Verification Engineer (Shader Core) who are motivated to challenge the status quo. If you are excited about finding that last bug in next generation GPU shader core , our team is on the lookout for you!

The Person

You are an “out of the box” thinker, motivated to absorb dynamic changes and thirsty to keep innovating.

You will be part of a fast-paced team working on the GPU shader design, a team of engineers of varied disciplines who are responsible for micro-architecting, designing and delivering GPU shader IP for various products. Since we are the heart of GPU engine, we challenge ourselves to have “ 0” bug escapes post tape out. No idea is too small; we welcome every initiative that makes our product better.

You will be working on the verification of GPU shader core, the hardware bridge of the GPU ISA (instruction set architecture). You will be responsible for developing validation collaterals including testbench, C++ model and testplan. You will be working with software, architecture, and design leads to understand all various scenarios that shader core needs to be tested for. You will analyze all the legal cases that a GPU ISA support and develop tests/coverage for functional and performance testing. You will ensure the block is signed off with 100% metrics on key quality indicators. You will be the key point of contact on debug requests from various horizontal verification teams (Graphics core simulation, emulation and customer requests)

Key Responsibilities

Define, write and execute test cases that will ensure all scenarios supported by ISA are covered.
Work with the designer to understand pipeline nuances. Define and write tests to hit functional and performance coverage
Build infrastructure to support new features in GPU. Work with functional reference model team to enable feature validation.
Enable automation to make regression execution more efficient. Always be on the lookout to solve

How can I run less tests to get more coverage?
How can I automate test execution triaging accurately?
How can I automate interpretation of certain failure signatures

Preferred Experience

Knowledge of GPU shader pipeline or CPU core pipeline and ISA (instruction set architecture)
Knowledge of Design Verification of complex systems
Knowledge of with SystemVerilog, UVM, and C++
Knowledge of using various EDA tools for simulation, formal verification, and coverage analysis

Academic Credentials

Undergrad degree required. Bachelor’s or Master’s in Electrical engineering. Computer Engineering or Computer Science preferred.

LOCATION:

Preferred locations are any U.S. site for AMD graphics: Santa Clara CA

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

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