Job Title: FPGA / RTL Design Engineer
Location: San Jose, CA
Job Description
FPGA/RTL Design
Engineer to design, implement, and validate digital circuits and FPGA-based
solutions. This role involves hands-on development using RTL languages, FPGA
design tools, and simulation environments, while also supporting customers and
creating technical assets that enable successful adoption of our products.
Key Responsibilities
Design & Implementation: Develop RTL code (Verilog, VHDL, SystemVerilog) for
FPGA and digital circuits, integrating IP and system software.
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Simulation & Debugging: Perform functional simulation, debug FPGA designs, and resolve design issues.
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Validation & Testing: Create unit tests, example designs, and demos; ensurereadiness of feature releases.
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Technical Enablement: Develop user guides, application notes, and training materials for customers.
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Customer Support: Respond to technical inquiries, reproduce issues, and collaboraten with engineering teams for resolution.
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Optimization Conduct synthesis, power, and thermal analysis to meet performance and efficiency targets.
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Collaboration:Work closely with architecture, verification, and physical design teams to deliver high-quality solutions.
Minimum Qualifications
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BS in Electrical/Computer Engineering or related field.
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5+ years of experience in FPGA design, RTL development, or applications engineering.
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Proficiency in FPGA design tools and third-party simulators.
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Strong debugging skills and experience with FPGA development boards.
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Expertise in RTL design using Verilog, VHDL, or SystemVerilog.
Preferred Qualifications
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Experience with power/thermal analysis tools.
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Scripting skills (TCL, Python).
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Strong problem-solving and analytical abilities.