FPGA / RTL Design Engineer

PDSSOFT 

📍 San Jose, United States 🇺🇸

full-time
senior
Posted —

Key Skills

FPGARTLVerilogVHDLPython

Industry

SemiconductorTelecommunications

Job Description

FPGA / RTL Design Engineer

Location: San Jose, CA





Job Descriptio

n:FPGA/RTL Design Engineer to design, implement, and validate digital circuits and FPGA-based solutions. This role involves hands-on development using RTL languages, FPGA design tools, and simulation environments, while also supporting customers and creating technical assets that enable successful adoption of our product


s.
Minimum Qualificati

  • onsBS in Electrical/Computer Engineering or related fie
  • ld.5+ years of experience in FPGA design, RTL development, or applications engineeri
  • ng.Proficiency in FPGA design tools and third-party simulato
  • rs.Strong debugging skills and experience with FPGA development boar
  • ds.Expertise in RTL design using Verilog, VHDL, or SystemVeril


og.
Preferred Qualificat

  • ionsExperience with power/thermal analysis to
  • ols.Scripting skills (TCL, Pyth
  • on).Strong problem-solving and analytical abilit


ies.