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FPGA Lead Engineer

📍 Hsinchu, Taiwan, Taiwan, Taiwan 🇹🇼

full-time

senior

Posted —

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FPGAVerilogVHDLPCIeDDR

SemiconductorConsumer Electronics

Job Description

Lead FPGA development activities across functional prototyping, emulation, performance evaluation, and database generation flows.
Work closely with architecture, design, verification, software, firmware, and performance teams to understand system requirements and define FPGA implementation strategy.
Drive FPGA functional flow, including RTL integration, FPGA partitioning, synthesis, place-and-route, timing constraints, timing closure, bitstream generation, bring-up, and debug.
Drive FPGA performance flow to support in-house performance evaluation, workload execution, data collection, profiling, and performance database generation.
Design, implement, integrate, and optimize FPGA logic using Verilog/SystemVerilog/VHDL.
Develop and maintain FPGA prototypes and emulation platforms for system validation, software enablement, firmware development, and hardware/software debug.
Support performance analysis by enabling representative workloads, collecting runtime metrics, identifying bottlenecks, and collaborating with architecture/design teams on improvement opportunities.
Define and improve FPGA methodology, automation, build flows, regression infrastructure, and debug processes for both functional and performance use cases.
Support and integrate interfaces such as PCIe, DDR, AXI, Ethernet, SPI, I2C, UART, and other standard protocols.
Provide technical leadership, mentor engineers, coordinate cross-functional execution, and drive issue resolution across multi-site teams.

Main Requirements and Qualifications

MS/PhD or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, or related fields.
10+ years of experience in FPGA design, implementation, prototyping, emulation, validation, or performance evaluation.
Strong leadership experience in driving FPGA projects, methodologies, schedules, and cross-functional technical execution.
Strong RTL design and integration skills using Verilog, SystemVerilog, or VHDL.
Solid knowledge of FPGA implementation methodology, including synthesis, place-and-route, timing constraints, timing closure, resource optimization, and bitstream generation.
Experience building and supporting FPGA platforms for both functional validation and performance analysis.
Experience with FPGA tools such as AMD/Xilinx Vivado, Intel Quartus, Synplify, Questa, VCS, or similar tools.
Strong debugging skills across simulation, FPGA hardware, lab bring-up, and system-level environments.
Hands-on experience with FPGA bring-up and lab debug tools such as oscilloscopes, logic analyzers, protocol analyzers, and JTAG.
Experience with automation and scripting languages such as Python, Tcl, Perl, or shell.
Strong problem-solving, communication, teamwork, and technical leadership skills.
Able to work effectively in a fast-paced, multi-site engineering environment.