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MediaTek

Design Verification Engineer

๐Ÿ“ŒHsinchu, Taiwan ๐Ÿ‡น๐Ÿ‡ผ

โฑ๏ธŽ full-time

๐Ÿง™โ€โ™‚๏ธ junior

๐Ÿ’ฐ 29000

Job Description

  • Application of formal method in digital hardware or software verification
  • Literature survey and paper study of the state-of-the-art and industrial strength formal method
  • Conducting cross-team-wise technical training
  • Documentation writing and reviewing
  • The estimated salary is NT$29000-50000 per month, which is subject to candidates' qualification.

Requirement

  • Bachelor of Science degree in CS or Math major
  • Background in the logic, language and computation
  • Familiar with functional language (Haskell, Ocaml) and formal method
  • Goal-oriented and working independently with effective execution.
  • Good communication skills and good at English
  • Good at logic and critical thinking
  • 1+ year working experience is a plus.
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  • Employment

    โฑ๏ธŽ full-time

  • Experience

    ๐Ÿง™โ€โ™‚๏ธ junior

  • Salary

    ๐Ÿ’ฐ 29000

  • Skills
  • Industry
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