Design Verification Engineer
HCLTech Vietnam ↗
📍 Markham, Canada 🇨🇦
full-time
mid-level
on-site
Expired
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Key Skills
SystemVerilogUVMIPvalidationgraphics
Industry
SemiconductorConsumer Electronics
Job Description
- 5 days onsite from day 1 at Markham Canada office
- Must have strong experience in System Verilog & UVM.
- Design Verification engineering relevant experience 7-13 yrs.
- Verification of display IP used in graphics card.
- IP/SS and end to end testing for these blocks.
- Exp in DV flow including SV, UVM.
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Key Skills
SystemVerilogUVMIPvalidationgraphics
Industry
SemiconductorConsumer Electronics