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Design Verification Engineer

ExecutivePlacements.com

📍 Sunnyvale, United States 🇺🇸

full-time

mid-level

hybrid

Posted —

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Key Skills

Verification SystemVerilog UVM Debugging Architecture

Industry

Semiconductor Robotics

Job Description

Job title: Design Verification Engineer

Location: San Jose, CA(Hybrid)

Type: Fulltime/Contract

Job Description

Design Verification expertise in System Verilog /UVM Unit/Module level Verification
Experience in test planning and debugging complex designs
Full silicon design lifecycle experience
Strong background in developing UVM Testbenches from scratch
Deep understanding of Computer Architecture
Test Planning, Coverage, Bring up Phase, Design Freeze and ECO Phase
Experience with caches and memory subsystems (preferred, but not mandatory)
C++ Nice to have

Diverse Lynx LLC is an Equal Employment Opportunity employer. All qualified applicants will receive due consideration for employment without any discrimination. All applicants will be evaluated solely on the basis of their ability, competence and their proven capability to perform the functions outlined in the corresponding role. We promote and support a diverse workforce across all levels in the company.