About Us:
At InspireSemi, we're not just building a chip; we're revolutionizing high-performance computing. Our groundbreaking architecture packs thousands of 64-bit CPU cores onto a single chip, all tightly integrated with a high-performance interconnect. We're driven by a mission to make high-performance computing more accessible and energy-efficient, with a developer-friendly programming model. Ready to make a real impact? Join our passionate team!
Why Join InspireSemi?
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Make an Impact:
Your work will directly contribute to building a high-performance compute accelerator for scientific, AI, and other applications.
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Rewarding Compensation:
We offer competitive salaries, benefits, and equity.
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Flexibility:
Benefit from a hybrid work environment in our Austin office, with exceptional candidates considered for fully remote work.
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Grow With Us:
Contribute to the development and improvement of verification methodologies, tools, and automation scripts.
The Opportunity:
We are looking for a SoC Design Verification Engineer to support the complete verification of our innovative System-on-Chip (SoC). This critical role encompasses our RISC-V core, network, and 3rd-party peripheral IP integrations. You will be responsible for developing comprehensive verification plans, building testbenches, and ensuring the highest level of design quality and functional correctness before tape-out.
What You'll Do:
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Develop and execute verification plans for complex SoC digital designs.
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Create and maintain UVM/SystemVerilog based testbenches and environments.
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Write, debug, and execute constrained-random and directed test cases.
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Implement RISC-V ISA compliance tests.
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Perform functional coverage analysis and close coverage gaps.
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Perform regression runs, analyze failures, and drive bug closure.
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Connect simulations to real user interfaces, stimulus generators, and checkers.
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Collaborate closely with RTL design engineers, architects, and software teams.
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Contribute to the development and improvement of verification methodologies and automation scripts.
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Perform preliminary debug of discovered issues.
What You Bring:
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A Bachelor's or Master's degree in Electrical, Electronics, or Computer Engineering (or related field).
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5+ years of hands-on experience in ASIC/SoC design verification.
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Strong proficiency in SystemVerilog, UVM, and simulation tools (e.g., Xcelium).
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Solid understanding of digital design fundamentals, RTL design, and synthesis flow.
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Experience with functional coverage, assertions, and scoreboarding.
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Strong scripting and programming skills (Python, Perl, TCL, C/C++).
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Knowledge of common bus protocols (AXI, AHB, PCIe, DDR4/5, etc.).
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Working knowledge of version control and continuous integration tools (e.g., Git, Jenkins, Jira, and Confluence).
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Solid debugging skills, analytical thinking, and attention to detail.
Bonus Points:
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Experience with Formal verification (Conformal LEC).
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Hands-on experience with emulation systems (Zebu, Palladium) or FPGA prototypes.
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Experience with Cadence EDA tools.
If you're excited about pushing the boundaries of computing and working on truly innovative technology in a rewarding environment, we'd love to hear from you!