DSP R&D Engineer
📌Irvine, CA, United States 🇺🇸
⏱︎ full-time
🧙♂️ mid-level
💰 91000
Responsibilities include:
- Develop specification, architecture, and micro-architecture of digital signal processing and communications algorithms
- Bit-exact MATLAB/Simulink and C/C++ system modeling and simulation
- Develop and run system level simulation suites of the copper Ethernet PHY transceivers and perform vector matching verification with RTL simulations
- Define and document chip requirements, architecture, verification and lab test plan
- Lab testing and debug of ASICs
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Documentation/application note development and customer support
- Master's and 3+ years of related experience; or PhD in Digital Signal Processing
- Knowledge in Communication Theory & Digital Signal Processing algorithms
- Experience in equalizers, Timing Recovery, Echo Cancellation and Gain Control algorithms
- Experience in C/C++, MATLAB/Simulink,
- Experience architecting communications systems for high performance ASIC based products is highly desirable
- Good hands-on skills in the lab
- Good oral and written communication skills
- Experience in Wireline Algorithms
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Experience in Ethernet 802.3 PHY Transceivers
Compensation And Benefits
The annual base salary range for this position is $91,000 - $146,000
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
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Employment
⏱︎ full-time
-
Experience
🧙♂️ mid-level
-
Salary
💰 91000
-
Skills
-
Industry
-
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