What you’ll do
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Design and implement embedded software libraries and low-level runtime for platforms.
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Develop and maintain the compiler path (MLIR/LLVM passes, code generation, kernels) that maps AI and DSP primitives and related operations to our hardware.
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Develop and refine a benchmarking and profiling framework that incorporates reproducible tests, dashboards, and regression gates.
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Strengthen build, test, and CI so releases are predictable and artifacts are easy to consume.
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Collaborate with hardware, architecture, and customer-facing teams; write precise specs and documentation; turn feedback into roadmap items.
Outcomes (first 18 months)
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A production-ready driver + runtime stack for at least one MCU target and one accelerator-class target.
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A working compiler path with visible wins in latency and energy on representative models, documented end-to-end.
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A stable benchmark suite with automated reports and performance guards integrated in CI.
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Developer-quality docs, examples, and reference projects that make first use smooth for partners.
Requirements
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5+ years building low-level software or compilers; strong C++ and Python; you have shipped production code.
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Hands-on experience with embedded systems and compiler design
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Solid systems understanding. memory and concurrency fundamentals
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Comfortable reading hardware datasheets and working at the HW/SW boundary.
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Evidence of performance work (profiling, tracing, optimization) on embedded or accelerator targets.
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Clear writing, good documentation habits, and a collaborative approach.
Nice to have
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Experience deploying deep-learning workloads on edge devices; familiarity with TensorFlow Lite for Micro, TVM, or IREE.
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HPC exposure (DirectML, OpenCL, CUDA) or DSP algorithm implementations.
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CI/CD depth and packaging for developer kits, utilizing GitHub Actions or a similar tool.
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Quantization and fixed-point experience for edge inference.