CPU DFT Verification Engineer

Summary

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!nnWe are looking for a strong candidate to join our processor verification team focusing on DFT verification. In this highly visible role, you will be at the center of a chip design effort collaborating with all subject areas, with a critical impact on getting functional products to millions of customers quickly.

Description

As a CPU DFT Verification Engineer, you will have the following responsibilities:nn

• Work closely with architecture, RTL designers, and DFT designers on verifying the functionality correctness of the DFT logicn
• Execute test plans for DFT logicn
• Develop testbenches and tests according to test plansn
• Debug simulation failuresn
• Develop coverage monitors and analyze coverage to ensure all test cases in the plans are coveredn
• Develop Verilog checkers or assertions to verify the designn
• Work with the silicon bringup team on developing tests that help the silicon bring up effort
  
  

Minimum Qualifications

Minimum BSnAcademic experience in computer architecturenAcademic experience in digital design using Verilog

Preferred Qualifications

Master’s degree preferrednKnowledge of DFT and structural debug concepts and methodologies: JTAG, MBIST and scannKnowledge of digital logic design, debug feature, and DFT architecture and microarchitecturenProficiency in programming and scripting in Python, Perl, or TCLnExperience or academic knowledge in design verification methodology. Understanding of verification testplans, Verilog/System-Verilog testbenches, transactors and checkersnGood understanding of CPU architecture is a plusnShould be an extraordinary teammate with excellent communication skills with the ability to articulate complex design issues during verification effortnBe able to follow detailed work schedules and work independently on the verification efforts for a block/area of the design

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $126,800 and $190,900, and your base pay will depend on your skills, qualifications, experience, and location.u003cbru003eu003cbru003eApple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. u003ca href='https://www.apple.com/careers/us/benefits.html' target='_blank' aria-label='Learn more about Apple Benefits (Opens in new window)'u003eLearn more about Apple Benefits.u003cspan class='icon icon-after icon-external' aria-hidden='true'u003eu003c/spanu003eu003c/au003eu003cbru003eu003cbru003eNote: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.u003cbru003e