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ASICS Design Verification Engineer

ExecutivePlacements.com

📍 San Diego, United States 🇺🇸

full-time
senior
140000
Posted —
Key Skills
SystemVerilog UVM Verification Automation UPF
Industry
Semiconductor Aerospace

Job Description

Overview

Qualcomm Technologies, Inc. Engineering Group, ASICS Engineering. The team is responsible for the complete verification lifecycle from system-level concept to tape-out and post-silicon support. The position involves comprehensive pre-silicon test planning for digital power IPs, testbench development using verification methodologies (SystemVerilog-UVM), coverage development, assertion model development, and formal verification (property checking). Learn and deploy power-aware UPF verification flow and methodology. Involves developing automation to improve verification efficiency.

Responsibilities

  • Lead and contribute to the complete verification lifecycle from concept to tape-out and post-silicon support.
  • Perform comprehensive pre-silicon test planning for digital power IPs.
  • Develop testbenches using SystemVerilog-UVM, create coverage metrics, and implement assertion models and formal verification (property checking).
  • Learn and deploy power-aware UPF verification flows and methodologies.
  • Develop automation to improve verification efficiency and productivity.

Qualifications

  • Bachelor\'s degree in Engineering, Science, or a closely related field
  • 4+ years of experience with ASIC design and verification tools, techniques, and methodology

Preferred Qualifications

  • Masters degree in Computer Science, Electrical Engineering, Computer Engineering, or a closely related field
  • 6+ years of experience with ASIC design and verification tools, techniques, and methodology
  • 6+ years of experience with digital design concepts and RTL languages such as SystemVerilog/Verilog or VHDL
  • 6+ years of experience with computer architecture fundamentals and C/C++ programming
  • 6+ years of experience with block-level testbench environments using SystemVerilog
  • 6+ years of experience with verification methodologies (UVM/OVM) and exposure to assertion-based formal verification
  • 6+ years of scripting/automation skills using Perl or Python
  • Experience with AMBA Bus protocols (AXI/AHB/APB) is desirable
  • Knowledge or experience with Assertion Based Formal Verification is desirable

Minimum Qualifications

  • Bachelor\'s degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience
  • Or Master\'s degree in Science, Engineering, or related field and 3+ years of related experience
  • Or PhD in Science, Engineering, or related field and 2+ years of related experience

Compensation

Pay Range: $140,000.00 - $210,000.00

The pay range reflects the broad minimum to maximum for the job code/location. Qualcomm also offers a competitive annual discretionary bonus program, potential RSU grants, and a comprehensive benefits package. Your recruiter can discuss details about Qualcomm benefits.

EEO and Accommodation

Qualcomm is an equal opportunity employer. Qualcomm provides accommodations for individuals with disabilities during the application/hiring process upon request. For accommodations, contact or call the toll-free number provided. Qualcomm will ensure accessibility in the hiring process and workplaces where feasible. (This email is for accommodation requests only; not for application status inquiries.)

EEO Statement: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

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