ASIC RTL Design Engineer

Company Description Truechip is a leading provider of design and verification solutions that help accelerate ASIC, FPGA, and SoC development while reducing cost and risk. Established in 2008, the privately held company has a global footprint and experienced leadership focused on delivering world-class verification IP solutions and expert consultancy. Truechip aims to be a one-stop provider of semiconductor IP, design, and verification services, guided by principles of customer success, commitment to quality, and best-in-class support. The company is recognized as a specialist in verification IP, with a strong track record of customer shipments and partnerships across multiple high-speed interface standards.

Role Description This is a full-time, on-site ASIC RTL Design Engineer role based in Bengaluru South. The role involves designing and implementing RTL for complex ASIC and SoC projects, translating architectural specifications into efficient, synthesizable code. Day-to-day responsibilities include creating and reviewing RTL code, performing logic design, collaborating with physical design and verification teams, and ensuring design convergence on timing, power, and area targets. The engineer will participate in formal verification, simulation-based validation, and design reviews to maintain high-quality standards. The role also requires close collaboration with cross-functional teams to support integration, debug, and sign-off activities.

Qualifications

• Candidates should possess strong skills in RTL Design and RTL Coding, including experience with Verilog/SystemVerilog or similar HDLs.
• Candidates should possess solid Logic Design skills, with a strong grasp of digital design concepts such as state machines, pipelines, and clocking.
• Candidates should possess relevant Physical Design understanding, including timing closure, synthesis constraints, and interaction with backend teams.
• Candidates should possess experience in Formal Verification, including use of formal tools and methodologies to validate RTL correctness.
• Sound knowledge of ASIC/SoC design flows, simulation, and verification environments.
• Bachelor’s or Master’s degree in Electrical Engineering, Electronics, or a related field.
• Ability to work collaboratively in a multidisciplinary team, with strong analytical and problem-solving skills.
• Good written and verbal communication skills, and attention to detail in documentation and reviews.

Best Regards,

Vibhuti Prajapati

Sr. Lead TA.

Truechip Solutions