Job Summary:
As a Front-End Implementation Engineer, you will be responsible for ensuring the successful design and implementation of semiconductor circuits with a focus on CDC/RDC. You will work closely with cross-functional teams to optimize designs for performance, power, and area while maintaining high standards of quality and reliability.
Key Responsibilities:
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Developed Design Constraints (SDC) for SOC for chip & block level.
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Perform Logic Equivalence Checks to resolve the critical issues.
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Collaborate with the synthesis and timing teams to achieve timing closure and optimize the design for power and performance.
Required Skills and Qualifications:
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Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
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Hand-on experience in Lint, Clock Domain Crossing (CDC), Synthesis, LEC.
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Minimum years of experience in front-end semiconductor design and implementation.
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Proven experience with CDC/RDC verification and debugging.
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Proficiency in RTL design using VHDL/Verilog/SystemVerilog.
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Strong understanding of CDC/RDC methodologies and tools.
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Experience with EDA tools for synthesis, STA, and formal verification (e.g., Synopsys, Cadence, Mentor Graphics).
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Knowledge of scripting languages (e.g., Python, Perl, TCL) for automation.