Key Skills
ASICSoCSystemVerilogVerilogRTL
Industry
SemiconductorAI
Job Description
About The Job
Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark , General Catalyst , Peter Thiel , Adam D'Angelo , Larry Summers , and Jack Dorsey .
Position: ASIC/SoC Design & Verification Engineer
Type: Contract
Compensation: $70–$100/hour
Location: Remote
Commitment: 20–40 hours/week
Role Responsibilities
Must-Have
,
Mercor connects elite creative and technical talent with leading AI research labs. Headquartered in San Francisco, our investors include Benchmark , General Catalyst , Peter Thiel , Adam D'Angelo , Larry Summers , and Jack Dorsey .
Position: ASIC/SoC Design & Verification Engineer
Type: Contract
Compensation: $70–$100/hour
Location: Remote
Commitment: 20–40 hours/week
Role Responsibilities
- Design realistic chip engineering problems based on personal experience in ASIC/SoC design and verification.
- Develop comprehensive solutions including reference RTL, testbenches, and supporting materials using SystemVerilog/Verilog.
- Evaluate AI models by running engineering problems and analyzing performance.
-
Collaborate with team engineers to maintain high standards of rigor and difficulty.
Must-Have
- Hands-on experience in ASIC/SoC design and/or functional verification.
- Proficiency in SystemVerilog/Verilog.
- Familiarity with industry toolchains like Synopsys VCS, Cadence Xcelium, Siemens Questa, or open-source equivalents.
- Understanding of subsystem/SoC-level concerns such as interface protocols and multi-module dataflow.
- Expertise in at least one area: RTL design, IP integration, functional verification, formal verification, or analog/mixed-signal design verification.
-
Availability for 20–40 hours/week.
-
Experience in AI training, model evaluation, or data annotation.
- For details about the interview process and platform information, please check: https://talent.docs.mercor.com/welcome
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For any help or support, reach out to: [email protected]
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Key Skills
ASICSoCSystemVerilogVerilogRTL
Industry
SemiconductorAI
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