Senior RTL/Synthesis Engineer – Fusion Compiler & Automation

Job Title: Senior RTL/Synthesis Engineer – Fusion Compiler & Automation

Location: Bay Area, CA / Remote

Job Overview

We are seeking a highly skilled Senior RTL/Synthesis Engineer with strong expertise in RTL implementation, synthesis flows, Fusion Compiler, and EDA flow automation. The ideal candidate will have hands-on experience developing and optimizing synthesis methodologies while building automation frameworks using Python, Perl, and TCL.

Key Responsibilities

• Develop and maintain RTL designs using Verilog/SystemVerilog.
• Execute synthesis flows using Fusion Compiler and Design Compiler.
• Develop automation scripts and wrapper frameworks around EDA tools.
• Optimize synthesis methodologies for performance, power, and area.
• Create and maintain flow automation using Python, Perl, and TCL.
• Support front-end design implementation and tool integration.
• Collaborate with architecture, verification, and physical design teams.
• Troubleshoot synthesis and implementation issues.

Required Qualifications

• Bachelor's or Master's degree in Electrical Engineering or related field.
• 7+ years of semiconductor design experience.
• Strong expertise in:
• RTL Design
• Verilog/SystemVerilog
• Synthesis
• Fusion Compiler
• Design Compiler
• Strong scripting skills using:
• Python
• Perl
• TCL
• Experience developing automation frameworks and tool wrappers.
• Knowledge of SoC/IP design methodologies.

Preferred Qualifications

• Experience with PCIe, AXI, APB, and ARM-based designs.
• Experience with SpyGlass, VCS, and front-end verification tools.
• Understanding of low-power methodologies and UPF.

Key Skills

• RTL Design
• Fusion Compiler
• Design Compiler
• Python
• Perl
• TCL
• Flow Automation
• Verilog/SystemVerilog
• SoC Design