Principal Engineer, Firmware & Product Test

Summary

Micron's Firmware & Product Test (FPT) team is hiring a Principal Test Development Engineer to lead front-end firmware validation for enterprise SSDs. In this role, you'll own verification strategy for NVMe front-end features, drive automation framework development, and serve as a technical authority for failure analysis and debug methodologies. You'll leverage AI-enabled tools and workflows to accelerate validation efficiency. You'll mentor engineers, define test coverage standards, and collaborate with firmware architects to influence testability decisions. The FPT team builds verification plans in Python, enforces NVMe and security protocol compliance, and executes white-box, grey-box, and black-box testing across simulation, FPGA, and prototype hardware environments.
 

Responsibilities

• Lead design and execution of firmware verification strategies for NVMe front-end features (SMART, Trim, Get Log Page, OCP, Identify, Namespace Management) across multiple product lines.

• Own end-to-end test development lifecycle — from spec analysis and test planning through automation, execution, and coverage closure.

• Drive root-cause analysis for critical field and regression failures; establish systematic debug methodologies using coyote logs, protocol analyzers, and firmware traces.

• Architect and maintain scalable test automation frameworks that become organizational standards for firmware quality.

• Lead failure analysis efforts, correlating test observations with firmware behavior to identify defect root causes and recommend fixes.

• Define test coverage standards, conduct code reviews, and drive continuous improvement in test effectiveness and code quality.

• Own test infrastructure improvements including CI/CD integration, regression automation, and reporting dashboards.

• Leverage AI-enabled tools and methodologies to enhance productivity, accelerate test development, and improve failure triage efficiency.

• Identify and implement opportunities to apply data analytics and ML techniques for test optimization, anomaly detection, and predictive failure analysis.

• Mentor junior and mid-level engineers, providing technical guidance on test development, debug techniques, and best practices.

• Collaborate with firmware architects and product teams to define testability requirements and influence design decisions.

• Present technical findings, risk assessments, and validation status to cross-functional stakeholders.

Basic Qualifications

• Bachelor's degree with ~10+ years of relevant experience, Master's with ~8+ years, or PhD with ~6+ years in Computer Science, Electrical/Computer Engineering, or a related field.

• Expert-level Python proficiency with a track record of building production-quality test automation frameworks.

• Strong experience in NVMe front-end feature validation (SMART, Admin Commands, Namespace Management, OCP).

• Demonstrated expertise in failure analysis — systematic debug, log analysis, root-cause identification, and defect documentation.

• Deep understanding of test architecture, automation strategy, and validation methodologies.

• Proficiency with AI-enabled development tools and willingness to adopt AI-powered workflows to enhance engineering productivity.

• Proven ability to lead technical initiatives and mentor engineers.

• Excellent communication skills with the ability to convey complex technical concepts to diverse audiences.

Preferred Qualifications

• Deep understanding of NVMe and PCIe specifications at the protocol level.

• Experience with storage firmware architecture and SSD validation methodologies.

• Familiarity with NAND flash memory architecture and FTL concepts.

• Proficiency with Rust or C for firmware code comprehension and grey-box testing.

• Experience with protocol analyzers, coyote event logs, and firmware debug tools.

• Working knowledge of Linux/Windows system administration and Git/CI/CD pipelines.

• Experience applying AI/ML techniques for test optimization, intelligent failure triage, or anomaly detection in validation environments.

• Experience leading cross-functional initiatives or small teams.