Job Description
<p><strong>Location:</strong> Vienna (On-site / Hybrid)<br><strong>Division:</strong> R&D</p>
<p><strong>Reporting Line:</strong> Head of R&D (Line Manager); SW Team Lead (Functional Lead)</p>
<p><strong>About PIDSO</strong></p>
<p>For over 15 years, PIDSO has been developing high-performance communication solutions βMade in Austriaβ β built for environments where failure is not an option.</p>
<p>Our antenna and RF systems enable reliable data transmission and signal processing in mission-critical applications across aerospace, defense, motorsport, automotive, and Industry 4.0.</p>
<p>We combine research, development, manufacturing, and testing under one roof. Fast, focused, and with uncompromising attention to detail.</p>
<h2 id="tasks">Tasks</h2>
<p><strong>The Mission</strong></p>
<p>Working closely with our Lead DSP Architect, you will contribute across the full signal processing workflow β from algorithm evaluation and simulation to deterministic, real-time execution on Zynq-7000 and MPSoC platforms. Depending on your background, you will be expected to engage at both the algorithmic and implementation level: understanding the mathematics behind what you implement, not just the code.</p>
<p><strong>Key Responsibilities</strong></p>
<ul>
<li><strong>Algorithm Development:</strong> Participate in algorithm design, feasibility analysis, and simulation (Python/MATLAB) for tasks including radar processing, tracking filters, sensor fusion, and SDR. </li>
<li><strong>Embedded Deployment:</strong> Implement and optimize DSP algorithms in C/C++ for ARM Cortex-A/R; apply NEON/SIMD intrinsics and cache-aware memory strategies where required.</li>
<li><strong>Verification:</strong> Design and maintain test suites validating embedded output against golden models.</li>
<li><strong>FPGA Interface:</strong> Integrate DSP logic with FPGA IP cores over AXI/DMA in collaboration with the hardware team.</li>
<li><strong>Product Improvement:</strong> Identify algorithmic or implementation bottlenecks in existing products and drive targeted improvements.</li>
</ul>
<h2 id="requirements">Requirements</h2>
<p><strong>Your Profile</strong></p>
<ul>
<li><strong>Education:</strong> MSc or PhD in Electrical Engineering, Communications Engineering, or a related field with strong signal processing content. Equivalent industry experience considered.</li>
<li><strong>DSP Depth:</strong> Strong theoretical and applied knowledge β fixed-point arithmetic, spectral analysis/FFT, estimation theory, adaptive filters, Kalman filtering. You are comfortable deriving before implementing.</li>
<li><strong>Implementation Skills:</strong> Production-level C/C++; Python or MATLAB for simulation and verification. Familiarity with Git and CI/CD pipelines.</li>
<li><strong>Embedded Experience:</strong> Solid understanding of SoC architecture (ideally Xilinx Zynq/MPSoC), memory hierarchy, and RTOS concepts. FPGA/RTL exposure is a plus, not a requirement.</li>
<li><strong>Mindset:</strong> You are comfortable owning the gap between a mathematical model and a resource-constrained system β and are bothered when the two don't match.</li>
<li><strong>Domain Interest:</strong> Background or genuine curiosity in antenna systems, software-defined radio, or radar is a meaningful plus.</li>
<li><strong>Experience:</strong> 3+ years in a DSP-focused role or equivalent academic/research background with hands-on embedded exposure.</li>
</ul>
<h2 id="benefits">Benefits</h2>
<p><strong>Why Join Us?</strong></p>
<p>Join a small, highly capable engineering team building RF technology that performs when failure is not an option. Work at the intersection of advanced signal processing, embedded systems, SoC architectures, and real-world physics β where mathematical models meet resource-constrained hardware and engineering decisions have a tangible impact.</p>
<p>At PIDSO, you will work alongside experienced experts, move fast without corporate overhead, and contribute directly to mission-critical communication and radar technologies developed and manufactured in Austria.</p>
<p><strong>Salary</strong></p>
<p>For this position, the minimum salary according to the Kollektivvertrag Metallgewerbe (Verwendungs-gruppe III, 6 years) is β¬ 3.300,16 gross per month, with a clear willingness to overpay based on your existing projects and technical skills.</p>
<p><strong>Interested?</strong></p>
<p>Send us your application (CV and relevant certificates)! </p>
<p>Please include your name and the position you are applying for in the subject line. We look forward to hearing from you!</p>