System IP Design Verification Engineer
📌San Jose, United States 🇺🇸
⏱︎ contract
🧙♂️ mid-level
Prodapt is a global technology company and the largest specialized player in the Connectedness industry. As an AI-first strategic partner, Prodapt provides consulting, business transformation, and managed services to top telecom and tech enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software services . We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include firmware, device drivers, RTOS porting, and board bring-up . A “Great Place To Work® Certified™” company, Prodapt employs over 6,000 technology and domain experts in 30+ countries. Prodapt is part of the 130-year-old business conglomerate
The Jhaver Group, which employs over 32,000 people across 80+ locations globally.
We're seeking a Verification Specialist that will be contributing directly to validation efforts on advanced system IP such as cache coherency and interconnect solutions. This is a hands-on technical lead role, centered on complex project delivery and extensive experience in both module and integration-level verification.
Looking for candidates in San Jose, CA
6 month contract
W2
Responsibilities
- Develop new, modular testbenches with reusability at the core
- Identify and champion process enhancements and automation to boost team throughput
- Drive feature ownership—manage workload to meet project targets
- Execute and interpret gate-level simulation (GLS) results
- Draft coverage-driven test plans and deliver presentations for key partners
- Partner with RTL and SoC designers to clarify requirements and resolve ambiguities
- Build and maintain verification infrastructure, tests, and stimuli
- Complete design feature validation hand-in-hand with architects; troubleshoot failures
- Design assertions, checkers, coverage strategies, and random constraints in SystemVerilog
- Investigate and debug test failures, tracing to root causes across regressions
- Assess and report coverage data, identifying gaps for closure
- Support full-chip bring-up alongside SoC and performance engineering teams
- Analyze and solve issues found in gate-level and power-aware scenarios (UPF)
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Contribute to post-silicon debug activities as needed
- Familiarity with ARM-based standards, for example CHI, AXI, ACE-Lite, APB, etc.
- Expertise in source control systems (Git) and typical scripting languages (Unix, Perl, Python)
- Skilled communicator with proficiency in technical documentation and discussions
- Track record of working with GLS and power simulation flows
- Exposure to formal property checking is a plus
- Direct experience spanning cache/interconnect validation and LPDDR memory is especially valued
Senior Embedded Software Engineer
@ Embedd 
What we're looking for
At embedd.it, we power hardware-software integration in embedded devices. We turn fragmented semiconductor chip data into configurable digital twins, then deterministically generate code, tests, and documentation – making integration faster, cheaper, and resilient to supply chain shocks.
We’re looking for a true legend – someone with abstract thinking and deep expertise in low-level software development. You’ll build vendor-agnostic tooling for MCU and peripheral integration to solve hardware-software integration once and for all. We work at the intersection of embedded systems, code generation, compilers, and machine learning. It’s your chance to help redefine how low-level development is done.
Responsibilities
- Drive the architecture of the driver structures and system layout
- Define scalable patterns for cross-architectural integration across bare-metal, Zephyr, Linux, and other environments
- Deconstruct complex SoC device trees and translate hardware descriptions into structured internal models for automated reasoning
- Partner with the ML team to shape data and annotation models for AI-driven data-extraction tooling
Qualifications
- 5+ years of experience in embedded systems development, including bare-metal and RTOS-based systems
- Proficiency in C/C++
- Familiarity with firmware configuration, SoC bring-up, and system-level debugging
- Hands-on experience with code generation tools, or low-level compiler/decompiler/emulator technologies
- Strong background in embedded toolchains: compilers, linkers, debuggers, and build systems
- Python or scripting for automation and tooling is a plus
- Experience with functional-safety standards is a plus
Why embedd.it?
- Dynamic, venture-backed team of engineers challenging the status quo 🚀
- Work at the intersection of embedded systems, code generators, compilers, and ML 🤖
- Unusual challenges requiring out-of-the-box abstract thinking 🧠
- Competitive compensation: cash + equity 💰
- Remote work possible 🌍
About Us
embedd.it is a UK-based startup reinventing embedded development. Our platform transforms unstructured semiconductor data into structured digital twins, enabling automatic generation of drivers, tests, and documentation. We're building a single, traceable source of truth to make integration fast, vendor-agnostic, and future-proof.
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Employment
⏱︎ contract
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Experience
🧙♂️ mid-level
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Skills
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Industry
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