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Infinera

Sr Analog Layout Engineer/Design Engineer

๐Ÿ“ŒSunnyvale, United States ๐Ÿ‡บ๐Ÿ‡ธ

โฑ๏ธŽ full-time

๐Ÿง™โ€โ™‚๏ธ senior

๐Ÿ’ฐ 112000

CA Pay Range (Annual)

$112,000.00 - $208,000.00

At Infinera, your base pay is one part of your total compensation package. Your actual base pay will depend on your skills, qualifications, experience, and location. This role may be eligible for equity grants, discretionary bonuses, or commission payments. The amount of these incentives is based on the terms of the Companyโ€™s incentive plans, the Companyโ€™s financial performance, and/or individual employee job performance.

Infinera also offers paid leave, medical,

dental, and vision coverage, 401(k),

life, and disability insurance to eligible employees.

Sr Analog Layout Engineer/Design Engineer

Brief Description: Full-time

Nokia is seeking a HighSpeed/Analog IC Layout Engineer to support the Optical Modules Group (OMG) located in Sunnyvale, CA.

Description

Nokia is seeking a High-Speed/Analog IC Layout Engineer for full-custom analog physical design in advanced HBT, bipolar BiCMOS process technologies. The engineer will be hands-on with all phases of physical design and back-end verification, including DRC, LVS, and parasitic extraction. The engineer must be an expert in high-frequency analog design flows and tools. The engineer must be experienced with full chip assembly and verification, as well as archive and tapeout processes. The self-motivated engineer must be able to anticipate problems and devise effective solutions in a fast-paced and team-oriented R&D environment.

Responsibilities

  • Required to support the physical design of high-speed analog ICs for fiber-based wireline applications
  • Required to support back-end verification, including DRC, LVS and parasitic extraction
  • Required to execute full chip assembly (top level) and verification
  • Familiar with archive and tapeout procedures.
  • Familiar with revision control tools
  • Preferred to have some experience with training others in standard layout procedures

Minimum Experience Requirements

8 years of experience with high-frequency analog IC layout and back-end verification with Cadence & Mentor Graphics Tools & other high-frequency design platforms Must have experience with high-frequency physical design in HBT, bipolar & BiCMOS process technologies Work Environment โ€“ must be comfortable working in a fast-paced environment โ€“ must be strong individual contributor with superior initiative & drive for business results โ€“ must be able to work effectively as member of a small team Communication โ€“ must have excellent written & verbal communication skills โ€“ must have excellent presentation skills

Minimum Expertise Requirements

Expert in high-frequency analog IC design concepts and must demonstrate superior critical thinking skills, problem-solving capabilities, and engineering judgment. Fluent with high-frequency analog EDA front and back-end tools:

  • Required โ€“ Cadence Virtuoso โ€“ analog layout & schematic
  • Required โ€“ Mentor Calibre โ€“ DRC & LVS & parasitic extraction
  • Preferred โ€“ UNIX/Linux and scripting (Perl/TCL/csh/etc)

โ€œThis position requires direct or indirect access to certain confidential information, hardware, software, technology, or technical information (referred to here as โ€œExport-Controlled Informationโ€) controlled under the U.S. International Traffic in Arms Regulations (ITAR) and/or the U.S. Export Administration Regulations (EAR). All personnel in this position must be eligible to or be able to obtain authorization from the appropriate agency to access applicable Export-Controlled Information. The U.S. Department of Commerce currently requires a foreign person with a most recent citizenship or permanent residency of Sudan, Ukraine, or a country currently designated in Country Group D:1, E:1 or E:2 (Supplement No. 1 to Part 740, Title 15) to have an export control license to access our Export-Controlled Information, unless they meet certain exemptions provided under U.S. export control laws and regulations. The list of applicable countries in Country Group D:1, E:1 or E:2 may be updated by the U.S. government from time to time. The current processing time for an export control license is approximately 4 to 6 months.

Your employment or engagement with Infinera shall be contingent on verifying your eligibility or requirement for obtaining a necessary license and/or authorization from the appropriate agency. You will be required to provide certain information for export control compliance assessment purposes, and your information will be reviewed by Infinera's hiring and export control teams to ensure compliance with the U.S. export control laws and regulations. Infinera will collect necessary documents (such as proof of citizenship etc.) to assess license/authorization requirements if you are offered and accept the position.โ€

Infinera is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, sex, color, religion, sexual orientation, gender identity, national origin, disability status, protected veteran status, or any other characteristic protected by law. Infinera complies with all applicable state and local laws governing nondiscrimination in employment.

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  • Employment

    โฑ๏ธŽ full-time

  • Experience

    ๐Ÿง™โ€โ™‚๏ธ senior

  • Salary

    ๐Ÿ’ฐ 112000

  • Skills
  • Industry
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