Senior Staff Engineer, Digital IC Design
📌MA, United States 🇺🇸
⏱︎ full-time
🧙♂️ senior
Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
As a Digital IC Design Principal Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a digital team of about eight people making a big impact on this organization, working on ultra-dense and performance Static Random Access Memory (SRAM) memory compilers.
This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates.
What You Can Expect
Test our custom and semi-custom Marvell products using our custom test architectures. Focus on end-to-end Design-for-test (DFT) solutions from architecture, implementation, verification, and mass production readiness (MPR). Complete DFT insertion in RTL and meet high test coverage and low DPPM requirements. Perform verification, which includes Synopsys spyglass checking, design rule checks as well as ATPG simulations. Work closely with the Physical Design (PD) team on the physical implementation of DFT structures and timing team to close the SOC design. Leverage the latest techniques, methodology, automation, and tools in the latest technologies (5nm, 3nm, 2nm). Work with test and product engineering teams to support hardware debug and test time for MPR of design.
What We're Looking For
Bachelor’s or foreign equivalent degree in Electrical/Electronic Engineering, Computer Science/Engineering, or a related field and five (5) years of experience in the job offered or related occupation.
Experience must include four (4) years with each of the following:
- ASIC-DFT Architecture design & implementation.
- Pre-Silicon RTL & GL validation of DFT implementation.
- Running formal verification rules on DFT structures and validation of the same.
- Verilog testbench development.
- Automation of the DFT flow.
- SSN Integration at block level & planning at top level.
- Test coverage improvement with different techniques.
- Debugging timing violation with STA team.
-
Post-silicon validation for different fault models and production test features.
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Senior Embedded Software Engineer
@ Embedd 
What we're looking for
At embedd.it, we power hardware-software integration in embedded devices. We turn fragmented semiconductor chip data into configurable digital twins, then deterministically generate code, tests, and documentation – making integration faster, cheaper, and resilient to supply chain shocks.
We’re looking for a true legend – someone with abstract thinking and deep expertise in low-level software development. You’ll build vendor-agnostic tooling for MCU and peripheral integration to solve hardware-software integration once and for all. We work at the intersection of embedded systems, code generation, compilers, and machine learning. It’s your chance to help redefine how low-level development is done.
Responsibilities
- Drive the architecture of the driver structures and system layout
- Define scalable patterns for cross-architectural integration across bare-metal, Zephyr, Linux, and other environments
- Deconstruct complex SoC device trees and translate hardware descriptions into structured internal models for automated reasoning
- Partner with the ML team to shape data and annotation models for AI-driven data-extraction tooling
Qualifications
- 5+ years of experience in embedded systems development, including bare-metal and RTOS-based systems
- Proficiency in C/C++
- Familiarity with firmware configuration, SoC bring-up, and system-level debugging
- Hands-on experience with code generation tools, or low-level compiler/decompiler/emulator technologies
- Strong background in embedded toolchains: compilers, linkers, debuggers, and build systems
- Python or scripting for automation and tooling is a plus
- Experience with functional-safety standards is a plus
Why embedd.it?
- Dynamic, venture-backed team of engineers challenging the status quo 🚀
- Work at the intersection of embedded systems, code generators, compilers, and ML 🤖
- Unusual challenges requiring out-of-the-box abstract thinking 🧠
- Competitive compensation: cash + equity 💰
- Remote work possible 🌍
About Us
embedd.it is a UK-based startup reinventing embedded development. Our platform transforms unstructured semiconductor data into structured digital twins, enabling automatic generation of drivers, tests, and documentation. We're building a single, traceable source of truth to make integration fast, vendor-agnostic, and future-proof.
Other similar jobs
Senior ASIC Timing Engineer
@ NVIDIA, 📍United States 🇺🇸
Senior ASIC Timing Engineer
@ NVIDIA, 📍United States 🇺🇸
CPU Physical Design Principal Engineer
@ Qualcomm, 📍United States 🇺🇸
ASIC Analog Design Engineer - REF79515L
@ Continental, 📍United States 🇺🇸
Staff Engineer, Digital IC Design
@ Marvell Technology, 📍United States 🇺🇸
ASIC Design Verification Engineer, Annapurna Labs
@ Amazon, 📍United States 🇺🇸
ASIC Design Verification Engineer, Annapurna Labs
@ Amazon, 📍United States 🇺🇸
ASIC RTL Engineer, Annapurna Labs
@ Amazon, 📍United States 🇺🇸
ASIC Physical Design Engineer, Annapurna Labs
@ Amazon, 📍United States 🇺🇸
ASIC RTL Engineer, Annapurna Labs
@ Amazon, 📍United States 🇺🇸
-
Employment
⏱︎ full-time
-
Experience
🧙♂️ senior
-
Skills
-
Industry
-
Find similar jobs
Senior ASIC Timing Engineer
@ NVIDIA, 📍United States 🇺🇸
Senior ASIC Timing Engineer
@ NVIDIA, 📍United States 🇺🇸
CPU Physical Design Principal Engineer
@ Qualcomm, 📍United States 🇺🇸
ASIC Analog Design Engineer - REF79515L
@ Continental, 📍United States 🇺🇸
Staff Engineer, Digital IC Design
@ Marvell Technology, 📍United States 🇺🇸
ASIC Design Verification Engineer, Annapurna Labs
@ Amazon, 📍United States 🇺🇸
ASIC Design Verification Engineer, Annapurna Labs
@ Amazon, 📍United States 🇺🇸
ASIC RTL Engineer, Annapurna Labs
@ Amazon, 📍United States 🇺🇸
ASIC Physical Design Engineer, Annapurna Labs
@ Amazon, 📍United States 🇺🇸
ASIC RTL Engineer, Annapurna Labs
@ Amazon, 📍United States 🇺🇸