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Lattice Semiconductor

Senior Staff Analog Design Engineer

๐Ÿ“ŒTaipei, Taiwan ๐Ÿ‡น๐Ÿ‡ผ

โฑ๏ธŽ full-time

๐Ÿง™โ€โ™‚๏ธ senior

Lattice Overview

There is energy hereโ€ฆenergy you can feel crackling at any of our international locations. Itโ€™s an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers. Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry. Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.Energy feeds on energy. If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a โ€œteam firstโ€ organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what youโ€™re looking for.

Responsibilities & Skills

The Senior Staff Analog Design Engineer is responsible for the design and development of analog, mixed-signal IC circuit blocks from initial specification and architecture to final, post-silicon verification to ensure specifications are met.

Responsibilities Include

  • Analog, mixed-signal circuit design and simulation.
  • Work with mask designers to deliver physical design.
  • Integration of analog/mixed-signal blocks into large, complex, digital chips.
  • Define bench-level test plans for post-silicon characterization.
  • Post-silicon measurements, characterization, and debug.
  • Lead/mentor junior engineers.

Qualifications

  • BS, MS, and/or PhD in Electrical Engineering or related fields.
  • Multiple years of experience working in analog/mixed-signal circuit design (BSEE, 10+ years, MS 8+ years, PhD 5+ years).
  • Proven design experience in most of the following analog, mixed-signal circuits: SerDes receivers/transmitters, low-jitter PLLs, oscillators, phase interpolators, ADC/DAC, high speed clock distribution, bandgap/bias, and voltage regulators.
  • In-depth knowledge of transistor mismatch, linearity, stability, low-power and low-noise techniques.
  • Experience designing circuits in advanced FinFET technologies.
  • Proficient in AMS design flows, tools, and methodologies like Cadence schematic capture, Virtuoso, Spectre, layout, and analog behavioral modeling.
  • Detailed oriented, with excellent problem-solving skills, communication skills, and the ability to work collaboratively in a fast-paced, team environment.
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