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Senior Lead CPU RTL Engineer

๐Ÿ“ŒAustin, United States ๐Ÿ‡บ๐Ÿ‡ธ

โฑ๏ธŽ full-time

๐Ÿง™โ€โ™‚๏ธ senior

๐Ÿ’ฐ 227000

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 10 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
  • Experience with RTL language (e.g. SystemVerilog) and related design processes (e.g., Lint, UPF).

Preferred qualifications:

  • PhD in Electrical Engineering or Computer Science.
  • Experience leading front-end design for modern processor components or AI accelerators.
  • Experience with ARM Instruction Set Architecture.
  • Experience with SOC design, architect, and integration.

About The Job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

The US base salary range for this full-time position is $227,000-$320,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Responsibilities

  • Participate in developing CPU subsystem. Develop CPU subsystem front-end designs, focusing on Advance Branch prediction algorithm and mid-core, IFU.
  • Work with leadership team to define strategy design direction for PPA. Propose performance enhancing microarchitecture features, and work with Software, Architect, and Performance teams for trade-off studies.
  • Communicate the pros and cons of microarchitecture enhancements. Deliver designs, meeting PPA goals with production quality.
  • Work with the Verification team to ensure production of quality designs, and the physical design and power teams to meet frequency, power, and area goals.
  • Collaborate with performance architects to explore new ideas to improve performance deduce power for next CPU generation


Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
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  • Employment

    โฑ๏ธŽ full-time

  • Experience

    ๐Ÿง™โ€โ™‚๏ธ senior

  • Salary

    ๐Ÿ’ฐ 227000

  • Skills
  • Industry
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