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Senior ASIC Timing Engineer

๐Ÿ“ŒAnn Arbor, United States ๐Ÿ‡บ๐Ÿ‡ธ

โฑ๏ธŽ full-time

๐Ÿง™โ€โ™‚๏ธ senior

The application window is expected to close on 8/25/25.

Job posting may be removed earlier if the position is filled or if a sufficient number of applications are received.

Meet the Team

Join our team at Acacia, where we design advanced optical transceivers for high-speed fiber optic transmission in data centers and telecommunication networks. This team is developing next generation 100G-1T coherent optical communications products.

Your Impact

This is a senior contributor role focused on delivering highly-complex ASICS in advanced technology nodes that are used in next generation telecom systems. The role involves detailed running timing analysis and driving timing closure at the full-chip level. This includes providing ECO scripts and guidance to designers for delivering tape-out quality for all parts of the design, in a highly team focused environment.

  • Involves in static timing analysis (STA) methodology and flow. Including but not limited to latest timing technologies, like latest on-chip variation modeling techniques, PVT selection, extraction methodology and flow, etc.
  • Run signoff timing analysis at the top level, drive closure of timing across the team. Interface with EDA vendors on issues/features/enhancements on timing tools.
  • Work closely with RTL designers to debug and root-cause timing issues related to design, tools, etc. and arrive at a feasible solution through the augmentation of input and design collateral.

Minimum Qualifications:

  • Bachelorโ€™s Degree in electrical engineering with 12 + years, or MS degree with 8 + years, or a PhD with 5+ year of experience
  • Experience in advanced technology nodes 16nm and below
  • Experience with industry standard CAD methodologies from Cadence, Synopsys and/or Mentor
  • Experience with scripting skills such as TCL, Perl, or Python.
  • Experience executing ASICs from product definition to production release.

Preferred Qualifications:

  • Experience with FinFET technologies
  • Experience with DSP algorithms
  • Experience in telecom design space
  • Experience presenting technical information to technical and non-technical audience

Why Cisco



  • At Cisco, weโ€™re revolutionizing how data and infrastructure connect and protect organizations in the AI era โ€“ and beyond. Weโ€™ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Simply put โ€“ we power the future.

    Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and youโ€™ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere.
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