About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As a Digital IC Design Principal Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage, Security, and Networking. You’ll be part of a digital team of about eight people making a big impact on this organization, working on ultra-dense and performance Static Random Access Memory (SRAM) memory compilers.

This team hires some of the biggest problem solvers in Silicon and has a huge impact on the work done at Marvell. The customers served by this team are often other chip companies and big tech companies, familiar names to all candidates.

What You Can Expect

Plan and coordinate the design, verification, and evaluation of analog mixed-signal circuits in high-speed data communication ICs. Work closely with digital design, design verification, firmware, and analog design engineers to ensure that projects are completed on time and in high quality. Collaborate with Analog/DSP/DV/FW/AE teams to coordinate the delivery of competitive SerDes IP solutions for all the Marvell product lines. Understand and improve the unique in-house design methodology and flow. Provide support to the product teams for both pre and post silicon. Lead the development and execution of analog mixed-signal development. Work with cross-functional teams to define requirements, create schedules and budgets, manage risks, and communicate with stakeholders. Develop and maintain relationships with key stakeholders. Identify and mitigate risks to project success. Track and report on analog mixed-signal IP development progress. Continuously improve project execution processes. Wage $200,000.00 - $240,000.00 per year.

What We're Looking For

Master’s or foreign equivalent degree in Electrical/Electronic Engineering, Computer Science/Engineering, or a related field and two (2) years of experience in the job offered or related occupation.

Experience must include two (2) years with each of the following:

• High-speed analog mixed-signal SerDes design.
• Analog mixed-signal design flow.
• EDA tool knowledge related to analog mixed-signal design.
• Serializer, Deserializer, DFE/Slicers, DCC.
• Designing highspeed slicers, clock distribution network and AFE.
• Calibration and Training algorithm for TX FEE and CTLE.
• PLL and LC Tank oscillators in various technology nodes.
• TX and RX specifications for various protocols such as PCIe, Ethernet and SATA.
  
  

Additional Compensation And Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.