Take responsibility for the design of high-performance, automotive SoC’s as a Digital IC Design Engineer for imec Germany!

About imec Germany

The automotive industry is at a turning point with advanced chiplet technology paving the way for autonomous driving and connected vehicles. Imec and the State of Baden-Württemberg are establishing a joint project to support the local and international automotive industry in derisking and accelerating the introduction of automotive chiplets into manufacturing.

In our new Advanced Chip Design Accelerator (ACDA) competence center, based at the Innovation Park AI (IPAI) in Heilbronn, we will be pushing the boundaries of what’s possible and accelerating the future of automotive. By leveraging imec’s world-leading expertise in semiconductor technology and packaging, we will be building the chiplet-based solutions that will power the vehicles of tomorrow to be smarter, safer, and more efficient.

What you will do

As a Digital IC Design Engineer you will be part of our multidisciplinary team to:

• Define concepts and architectures of high-performance System-on-Chip (SoC) design for Automotive application, addressing safety, security, and interfacing (e.g. D2D) challenges.
• Collaborate in an inter-disciplinary team. Understand (internal and external) customer needs, challenges and requirements and translate that into solutions that you can incorporate into your designs.
• Take responsibility for the design of high-performance, automotive SoC’s. This includes:
• Work closely with architects and system engineers to understand design specifications and performance targets;
• Propose and refine architectures and participate to define the IC specification;
• Propose design, implementation strategy and plan. Manage them over the duration of the project;
• Develop and implement RTL code that meets functional, performance, and area requirements based on design specifications;
• Collaborate with the system architect team, digital implementation team(s) and embedded SW and validation teams as well as the other project stakeholders;
• Supervise the verification planning and activities (possibly including mixed-signal verification).
• Document design specifications, RTL code, and design trade-offs clearly.
• Collaborate in an inter-disciplinary team. Understand (internal or external) customer needs, challenges and requirements and translate that into solutions that you can incorporate into your designs.
• Provide technical support and documentation for verification and physical design teams.

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology in our office in Germany (Heilbronn). With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth.

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary.

Who you are

• MSc or PhD in electronics engineering with 10+ years of relevant experience.
• Strong experience with digital circuit design in (System) Verilog.
• Experience with architecting and designing SoC with CPU/GPU, peripheral (sub-)systems, NoC, PLLs and interfaces.
• Experience with D2D interfaces and protocols (e.g. UCIe) for high-performance data exchange between chiplets.
• Experience with digital verification: linting, verification plan definition, verification methodologies (UVM), code/functional coverage, constrained random verification, verification plan execution and tracking.
• Understanding of the remaining steps of the digital ASIC-design flow is required: logic synthesis, timing analysis, power simulation, logic equivalence, DFT and/or P&R.
• Knowledge of stringent requirements for automotive application e.g. functional safety (ISO 26262), reliability (AEC Q100) and cybersecurity.
• Experience with scripting languages like TCL, Matlab and Python is required, experience with Cadence IC design tools is a plus.
• Understanding of the process of handing over RTL to a physical implementation team (SCD, UPF, clock definition...).
• Knowledge of FPGA-prototyping & low-power design is a plus.
• Structural way of working and ability to develop and manage activity planning is highly preferred.
• Previous experience working closely with (internal or external) stakeholders is a plus.
• Able to take initiative and responsibility for team’s success. Thinking pro-actively, working independently and having a creative problem-solving attitude are attributes that define yourself.
• Excellent communication skills in English (written and spoken).