Key Qualifications
- Preferably BE/B.Tech/ME/M.Tech in EEE/ECE/CSE with 5-12 years of relevant industry experience.
- Should have experience in verification methodology.
- Architecting and development of testbench, test-bench components for ISA features, clock/reset/power features of processor.
- Strong assembly and CPU (x86/ARM/RISC-V) architecture knowledge.
- Strong in C, C++, Verilog, and scripting (Perl, Python) languages.
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Ability to work independently and across geographies
Role and Responsibilities
- Work with CPU architects to get understand processor micro-architecture
- Develop detailed test and coverage plans for ISA and micro-architecture features
- Design and develop component, block and core level testbenches including stimulus engines, microarchitectural models, checkers
- Build architectural tools for ISA level verification
- Develop stimulus generators that scale from pre-silicon to emulation and post-silicon domain
- Execute verification plans, including DV environment bring-up, regression enabling for all features under your care, debug of the test failures
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Track and report DV progress using a variety of metrics, including bugs and coverage
- Deep knowledge in processor verification function and architecture, in areas such as cache coherence, memory ordering and consistency, prefetching, branch prediction, renaming, speculative execution, and memory translation
- Knowledge in Random Instruction Sequencing (RIS) and testing associated as block/unit and chip level for proving correctness
- Have lead a small team of verification engineers doing CPU verification
- Advanced techniques such as formal, assertions, and silicon bring up a plus
- Experience in writing test plans, portable benches, transactors, and assembly
- Experience with many different verification methodologies and tools such as simulators, coverage collection, gate level simulation
- Able to develop test bench and work independently on a block/unit of the design
Senior Embedded Software Engineer
@ Embedd 
What we're looking for
At embedd.it, we power hardware-software integration in embedded devices. We turn fragmented semiconductor chip data into configurable digital twins, then deterministically generate code, tests, and documentation – making integration faster, cheaper, and resilient to supply chain shocks.
We’re looking for a true legend – someone with abstract thinking and deep expertise in low-level software development. You’ll build vendor-agnostic tooling for MCU and peripheral integration to solve hardware-software integration once and for all. We work at the intersection of embedded systems, code generation, compilers, and machine learning. It’s your chance to help redefine how low-level development is done.
Responsibilities
- Drive the architecture of the driver structures and system layout
- Define scalable patterns for cross-architectural integration across bare-metal, Zephyr, Linux, and other environments
- Deconstruct complex SoC device trees and translate hardware descriptions into structured internal models for automated reasoning
- Partner with the ML team to shape data and annotation models for AI-driven data-extraction tooling
Qualifications
- 5+ years of experience in embedded systems development, including bare-metal and RTOS-based systems
- Proficiency in C/C++
- Familiarity with firmware configuration, SoC bring-up, and system-level debugging
- Hands-on experience with code generation tools, or low-level compiler/decompiler/emulator technologies
- Strong background in embedded toolchains: compilers, linkers, debuggers, and build systems
- Python or scripting for automation and tooling is a plus
- Experience with functional-safety standards is a plus
Why embedd.it?
- Dynamic, venture-backed team of engineers challenging the status quo 🚀
- Work at the intersection of embedded systems, code generators, compilers, and ML 🤖
- Unusual challenges requiring out-of-the-box abstract thinking 🧠
- Competitive compensation: cash + equity 💰
- Remote work possible 🌍
About Us
embedd.it is a UK-based startup reinventing embedded development. Our platform transforms unstructured semiconductor data into structured digital twins, enabling automatic generation of drivers, tests, and documentation. We're building a single, traceable source of truth to make integration fast, vendor-agnostic, and future-proof.
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