Analog Design, Sr Engineer
📌Bengaluru, India 🇮🇳
⏱︎ full-time
🧙♂️ mid-level
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are an enthusiastic and detail-oriented engineer passionate about analog design and timing. With 2–4 years of hands-on experience in timing characterization, you are adept at static timing analysis (STA) and thrive in a collaborative, high-tech environment. Your educational background in Electronics or Electrical Engineering (B.Tech/M.Tech) has equipped you with a solid theoretical foundation, while your practical experience has honed your problem-solving and analytical skills.
You have a strong command of transistor-level circuit simulation and are comfortable diving deep into debugging and resolving timing issues. Your fluency in scripting and automation allows you to optimize workflows, and you’re always eager to learn new tools and methodologies. Communication is one of your strengths; you can clearly articulate complex technical concepts and work effectively with cross-functional teams. You take ownership of your work, consistently deliver high-quality results, and are excited by the prospect of contributing to industry-leading innovations in DDR, HBM, and UCIE interfaces.
Driven by curiosity and a desire for continuous improvement, you are proactive in seeking feedback and are committed to fostering a culture of accountability and collaboration. You approach challenges with a growth mindset and are energized by opportunities to make a tangible impact in the rapidly evolving field of semiconductor technology.
What You’ll Be Doing:
- Performing static timing analysis (STA) and timing characterization for advanced analog and mixed-signal circuits.
- Generating and validating DDR, HBM, and UCIE timing by closely collaborating with circuit design and layout teams.
- Debugging and resolving timing violations at the circuit level using transistor-level simulation and analysis tools.
- Developing and maintaining automation scripts to streamline timing analysis workflows and improve efficiency.
- Documenting timing constraints, methodologies, and results to ensure clear communication across engineering teams.
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Contributing to technical reviews and supporting design teams with timing-related queries and optimizations.
- Enable the delivery of high-performance, reliable silicon IP by ensuring robust timing across critical interfaces.
- Drive innovation in timing characterization methodologies, enhancing product quality and competitiveness.
- Reduce design cycle times through effective automation and process improvements.
- Support cross-functional teams by providing expert guidance on timing-related challenges and solutions.
- Contribute to the successful launch of next-generation memory and interface technologies.
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Help Synopsys maintain its leadership in semiconductor IP by upholding best-in-class timing standards.
- 2–4 years of experience in timing characterization and static timing analysis (STA).
- Strong knowledge of static timing concepts, constraints, and debugging techniques.
- Proficiency in transistor-level design simulation and circuit-level debugging.
- Hands-on experience with tools such as SiliconSmart, NanoTime, or similar industry-standard EDA tools.
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Advanced scripting skills (e.g., Python, Perl, TCL) for automation of analysis workflows.
- Analytical thinker with a keen attention to detail.
- Effective communicator, both written and verbal, able to convey technical information with clarity.
- Collaborative team player who thrives in multidisciplinary environments.
- Proactive and accountable, taking ownership of tasks and driving them to completion.
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Adaptable and eager to learn, always seeking opportunities for growth and improvement.
You’ll join a dynamic and innovative analog design timing team, working alongside industry-leading engineers specializing in circuit design, layout, and timing analysis. The team is committed to technical excellence, knowledge sharing, and delivering state-of-the-art semiconductor solutions for global customers. Collaboration, continuous learning, and a shared passion for innovation define our culture.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
Senior Embedded Software Engineer
@ Embedd 
What we're looking for
At embedd.it, we power hardware-software integration in embedded devices. We turn fragmented semiconductor chip data into configurable digital twins, then deterministically generate code, tests, and documentation – making integration faster, cheaper, and resilient to supply chain shocks.
We’re looking for a true legend – someone with abstract thinking and deep expertise in low-level software development. You’ll build vendor-agnostic tooling for MCU and peripheral integration to solve hardware-software integration once and for all. We work at the intersection of embedded systems, code generation, compilers, and machine learning. It’s your chance to help redefine how low-level development is done.
Responsibilities
- Drive the architecture of the driver structures and system layout
- Define scalable patterns for cross-architectural integration across bare-metal, Zephyr, Linux, and other environments
- Deconstruct complex SoC device trees and translate hardware descriptions into structured internal models for automated reasoning
- Partner with the ML team to shape data and annotation models for AI-driven data-extraction tooling
Qualifications
- 5+ years of experience in embedded systems development, including bare-metal and RTOS-based systems
- Proficiency in C/C++
- Familiarity with firmware configuration, SoC bring-up, and system-level debugging
- Hands-on experience with code generation tools, or low-level compiler/decompiler/emulator technologies
- Strong background in embedded toolchains: compilers, linkers, debuggers, and build systems
- Python or scripting for automation and tooling is a plus
- Experience with functional-safety standards is a plus
Why embedd.it?
- Dynamic, venture-backed team of engineers challenging the status quo 🚀
- Work at the intersection of embedded systems, code generators, compilers, and ML 🤖
- Unusual challenges requiring out-of-the-box abstract thinking 🧠
- Competitive compensation: cash + equity 💰
- Remote work possible 🌍
About Us
embedd.it is a UK-based startup reinventing embedded development. Our platform transforms unstructured semiconductor data into structured digital twins, enabling automatic generation of drivers, tests, and documentation. We're building a single, traceable source of truth to make integration fast, vendor-agnostic, and future-proof.
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Employment
⏱︎ full-time
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Experience
🧙♂️ mid-level
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