ASIC FPGA Engineer
📌Bloomington, United States 🇺🇸
⏱︎ full-time
🧙♂️ mid-level
💰 111702
hybrid
Bachelor’s degree in Electrical or Computer Engineering, or a related Science, Engineering or Mathematics field, plus a minimum of 2 years of relevant experience; or Master's degree.
CLEARANCE REQUIREMENTS: Ability to obtain a Department of Defense Secret security clearance is required at time of hire. Applicants selected will be subject to a U.S. Government security investigation and must meet eligibility requirements for access to classified information. Due to the nature of work performed within our facilities, U.S. citizenship is required.
Responsibilities For This Position
General Dynamics Mission Systems has an opening for an ASIC FPGA Engineer in Bloomington, MN.
Duties and Tasks:
- Responsible for definition, design, verification and documentation for ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) developments
- Determines architecture, system simulation and detailed design approach
- Defines module interfaces and all aspects of device design and simulation
- Evaluates the process flow including but not limited to high level design, synthesis, place and route, timing and power utilization
- Creates test and simulation plans that establish functional criteria
- Verifies test results and analyzes performance
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May also review vendor capabilities, foundry technologies, device libraries and simulation tools
- Solid proficiency and able to perform all responsibilities associated with the position
- Grasps and applies new information quickly
- Solid ability to handle more complex assignments
- Shows initiative on assignments, exercises independent judgment and professionally executes projects with little direction
- Solid use of ASIC/FPGA concepts, principles, and theories
- Solid understanding of ASIC/FPGA engineering processes
- Keeps abreast of technology trends in ASIC/FPGA
- Solid awareness of business objectives and Engineering’s role in achieving
- Solid knowledge in Microsoft Office applications
- Solid knowledge in ASIC/FPGA design tools
- Solid written and verbal communications skills
- Ability to think creatively
- Ability to multi-task
- Solid skill in communicating issues, impacts, and corrective actions
- Solid understanding of basic earned value, Cost Account Management (CAM), and Variance Report generation
- Solid ability to recognize and clearly report information relevant to sound ASIC/FPGA design
- Solid development experience with Microchip Polarfire FPGAs
- Solid experience utilizing UVM (Universal Verification Methodology) for FPGA verifcation
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Solid experience developing in SystemVerilog
Company Overview
General Dynamics Mission Systems (GDMS) engineers a diverse portfolio of high technology solutions, products and services that enable customers to successfully execute missions across all domains of operation. With a global team of 12,000+ top professionals, we partner with the best in industry to expand the bounds of innovation in the defense and scientific arenas. Given the nature of our work and who we are, we value trust, honesty, alignment and transparency. We offer highly competitive benefits and pride ourselves in being a great place to work with a shared sense of purpose. You will also enjoy a flexible work environment where contributions are recognized and rewarded. If who we are and what we do resonates with you, we invite you to join our high-performance team!
Equal Opportunity Employer / Individuals with Disabilities / Protected Veterans
Senior Embedded Software Engineer
@ Embedd 
What we're looking for
At embedd.it, we power hardware-software integration in embedded devices. We turn fragmented semiconductor chip data into configurable digital twins, then deterministically generate code, tests, and documentation – making integration faster, cheaper, and resilient to supply chain shocks.
We’re looking for a true legend – someone with abstract thinking and deep expertise in low-level software development. You’ll build vendor-agnostic tooling for MCU and peripheral integration to solve hardware-software integration once and for all. We work at the intersection of embedded systems, code generation, compilers, and machine learning. It’s your chance to help redefine how low-level development is done.
Responsibilities
- Drive the architecture of the driver structures and system layout
- Define scalable patterns for cross-architectural integration across bare-metal, Zephyr, Linux, and other environments
- Deconstruct complex SoC device trees and translate hardware descriptions into structured internal models for automated reasoning
- Partner with the ML team to shape data and annotation models for AI-driven data-extraction tooling
Qualifications
- 5+ years of experience in embedded systems development, including bare-metal and RTOS-based systems
- Proficiency in C/C++
- Familiarity with firmware configuration, SoC bring-up, and system-level debugging
- Hands-on experience with code generation tools, or low-level compiler/decompiler/emulator technologies
- Strong background in embedded toolchains: compilers, linkers, debuggers, and build systems
- Python or scripting for automation and tooling is a plus
- Experience with functional-safety standards is a plus
Why embedd.it?
- Dynamic, venture-backed team of engineers challenging the status quo 🚀
- Work at the intersection of embedded systems, code generators, compilers, and ML 🤖
- Unusual challenges requiring out-of-the-box abstract thinking 🧠
- Competitive compensation: cash + equity 💰
- Remote work possible 🌍
About Us
embedd.it is a UK-based startup reinventing embedded development. Our platform transforms unstructured semiconductor data into structured digital twins, enabling automatic generation of drivers, tests, and documentation. We're building a single, traceable source of truth to make integration fast, vendor-agnostic, and future-proof.
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Employment
⏱︎ full-time
-
Experience
🧙♂️ mid-level
-
Salary
💰 111702
-
Working model
hybrid
-
Skills
-
Industry
-
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