ASIC Engineer, Physical Design
📌Sunnyvale, United States 🇺🇸
⏱︎ full-time
🧙♂️ senior
💰 212000
ASIC Engineer, Physical Design Responsibilities:
- Develop and own physical design implementation of multi-hierarchy SOCs optimized for Perf/W, including physical-aware logic synthesis, floorplan, place and route, clock tree synthesis, static timing analysis, IR drop, EM, and physical verification in advanced technology nodes
- Contribute to Architecture decisions for physical design, floorplanning, partitioning, clocking, etc. Work with the Design team to understand partition architecture and drive physical aspects early in the design cycle
- Resolve design and flow issues related to the physical design, identify potential solutions, and drive execution
- Deliver physical design of an end-to-end IP or integration of ASIC/SoC design and point out lower power and higher performance trade-offs
- Interface with the RTL design team to drive design modifications to resolve congestion/timing issues and implement functional ECO’s
- Use EDA tool-based programming and scripting techniques to automate and develop methodologies to improve throughput and quality
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Interact with EDA tool vendors to drive tool fixes and flow improvements. Perform tool evaluations of new vendor tools and functions
- 12+ years of experience in interpersonal, teamwork, and demonstrated experience communicating and interfacing with cross-functional teams, IP, and EDA vendors
- Experience in physical design and timing closure
- Knowledge of RTL2GDSII flow and experience with design tape-outs in 5nm or below process technologies
- Experience with EDA tools like DC/Genus, Innovus/ICC2, Primetime, Redhawk/Voltus, or Calibre
- Hands-on experience in SoC floor planning, place & route, power and clock distribution, and timing convergence of high-frequency designs
- Knowledge of geometry/process/device technology implications on physical design
- Experience with large/disaggregated SOC designs (>100M gates) with frequencies over 1GHZ
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Programming/scripting skills: TCL, Python, Perl or Shell
- Experience in full chip floor planning, partitioning, budgeting, and power grid planning
- Experience with low power implementation, power gating, multiple voltage rails, UPF/CPF knowledge
- Experience in planning, implementing, and analyzing high-speed clock distribution networks. Experience with alternate strategies for clock distribution, including standard trees, mesh, H-Tree, and clock power reduction techniques
- Knowledge of static timing analysis and concepts, defining timing constraints and exceptions, corners/voltage definitions
- Experience in the physical design of data-path intensive designs
- Experience in the 3D-IC technology, methodology, and advanced packaging
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Experience in validating Power Distribution Network (PDN), IR/EM, Thermals for 3D-IC
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
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$212,000/year to $291,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.
Senior Embedded Software Engineer
@ Embedd 
What we're looking for
At embedd.it, we power hardware-software integration in embedded devices. We turn fragmented semiconductor chip data into configurable digital twins, then deterministically generate code, tests, and documentation – making integration faster, cheaper, and resilient to supply chain shocks.
We’re looking for a true legend – someone with abstract thinking and deep expertise in low-level software development. You’ll build vendor-agnostic tooling for MCU and peripheral integration to solve hardware-software integration once and for all. We work at the intersection of embedded systems, code generation, compilers, and machine learning. It’s your chance to help redefine how low-level development is done.
Responsibilities
- Drive the architecture of the driver structures and system layout
- Define scalable patterns for cross-architectural integration across bare-metal, Zephyr, Linux, and other environments
- Deconstruct complex SoC device trees and translate hardware descriptions into structured internal models for automated reasoning
- Partner with the ML team to shape data and annotation models for AI-driven data-extraction tooling
Qualifications
- 5+ years of experience in embedded systems development, including bare-metal and RTOS-based systems
- Proficiency in C/C++
- Familiarity with firmware configuration, SoC bring-up, and system-level debugging
- Hands-on experience with code generation tools, or low-level compiler/decompiler/emulator technologies
- Strong background in embedded toolchains: compilers, linkers, debuggers, and build systems
- Python or scripting for automation and tooling is a plus
- Experience with functional-safety standards is a plus
Why embedd.it?
- Dynamic, venture-backed team of engineers challenging the status quo 🚀
- Work at the intersection of embedded systems, code generators, compilers, and ML 🤖
- Unusual challenges requiring out-of-the-box abstract thinking 🧠
- Competitive compensation: cash + equity 💰
- Remote work possible 🌍
About Us
embedd.it is a UK-based startup reinventing embedded development. Our platform transforms unstructured semiconductor data into structured digital twins, enabling automatic generation of drivers, tests, and documentation. We're building a single, traceable source of truth to make integration fast, vendor-agnostic, and future-proof.
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Employment
⏱︎ full-time
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Experience
🧙♂️ senior
-
Salary
💰 212000
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Skills
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Industry
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