ASIC Digital Design, Staff Engineer - 10655

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a highly motivated and innovative digital design engineer with a strong background in ASIC development, modeling, and digital signal processing. You possess a deep theoretical and practical understanding of high-speed serializer and data recovery circuits, making you a valuable asset to any team. Your experience in relevant ASIC digital design, coupled with your scripting expertise in languages like Shell, Perl, and Python, sets you apart. You have a good grasp of digital signal processing and components in high-speed SerDes PHY, such as CDR, ADC, and FracN PLL. Your proficiency in block-level and system-level modeling using Matlab, Simulink, Verilog, or System Verilog is impressive. With a BSEE or MSEE and over 3 years of digital design and verification experience, you excel in organizing and communicating effectively across different design groups and customers. Your knowledge of high-speed digital & mixed-signal ASIC design and experience in analog design further solidifies your expertise. You are eager to gain industry-leading knowledge and make an impact on next-generation flagship product architecture, quality, and customer engagement.

What You’ll Be Doing:

• Developing and verifying ASIC RTL designs at both chip and block levels.
• Creating and optimizing high-speed serializer and data recovery circuits.
• Performing functional and performance tests on test-chips.
• Collaborating closely with cross-functional teams of digital and mixed signal engineers.
• Utilizing scripting languages like Shell, Perl, and Python for automation and efficiency.
• Modeling and simulating designs using Matlab, Simulink, Verilog, or System Verilog.
  
  

The Impact You Will Have:

• Contributing to the development of high-end mixed-signal designs for PAM4- and NRZ-based SerDes PHY products.
• Enhancing the performance and reliability of next-generation silicon chips.
• Driving innovation in digital design and verification processes.
• Improving customer engagement and satisfaction through high-quality deliverables.
• Shaping the future of technology with cutting-edge designs and solutions.
• Collaborating with industry veterans to push the boundaries of digital and mixed-signal engineering.
  
  

What You’ll Need:

• Relevant ASIC digital design experience in the industry.
• Strong scripting expertise in Shell, Perl, Python, etc.
• Good understanding of digital signal processing.
• Theoretical and practical knowledge of high-speed SerDes PHY components like CDR, ADC, FracN PLL.
• Experience with block-level and system-level modeling using Matlab, Simulink, Verilog, or System Verilog.
  
  

Who You Are:

• An excellent communicator who can interact effectively with different design groups and customers.
• A well-organized professional who manages tasks efficiently.
• A team player who collaborates well with cross-functional domains.
• An innovative thinker who drives continuous improvement and innovation.
• A seasoned professional with a creative approach to problem-solving.
  
  

The Team You’ll Be A Part Of:

You will be part of a dynamic team of digital and mixed signal engineers responsible for delivering high-end mixed-signal designs. This team is dedicated to pushing the boundaries of technology and innovation, working on PAM4- and NRZ-based SerDes PHY products from specification development to functional and performance testing.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.