Bootstrap

TieTalent

ASIC Design Verification Engineer

๐Ÿ“ŒCalifornia, United States ๐Ÿ‡บ๐Ÿ‡ธ

โฑ๏ธŽ full-time

๐Ÿง™โ€โ™‚๏ธ senior

๐Ÿ’ฐ 141000

About

ASIC Design Verification Engineer page is loaded ASIC Design Verification Engineer Apply locations USA-CA San Jose Innovation Drive USA-CA Irvine Alton Parkway Bldg 2 USA-MA-Andover-Brickstone Square-Suite 401 USA-CO Broomfield time type Full time posted on Posted 3 Days Ago job requisition id R020948

Please Note

  • If you are a first time user, please create your candidatelogin account before you apply for a job. (Click Sign In > Create Account)
  • If you already have a Candidate Account, please Sign-In before you apply. Job Description:

Would you like to become part of a stable team developing silicon products for Ethernet systems in the Cloud? Come join this team creating devices that accelerate AI/ML workflows! This team develops high throughput Ethernet solutions that deliver unprecedented performance at critically important power efficiency. We are looking for highly skilled and efficient Constrained Random Design Verification engineers that want to verify new designs that can evolve rapidly at every generation in a very dynamic market using industry proven methodologies using System Verilog and UVM. You can become a member of an extremely skilled and efficient group of engineers. This is a rare opportunity to be part of a team that leads products for a new line of devices. The candidate will work with our worldwide design and architecture teams to develop leading edge products. All aspects of Design Verification will be involved, along with opportunities for technical leadership. Skills: Self motivated personality with a strong presence to do things right. Need to have a strong sense of teamwork and ability to work well with other. Constrained random verification methodologies with experience driving completion via coverage closure. Preferable to have skills with SV and UVM, well versed in OOP T

ools/Languages: System Verilog (TB structures - Class, SVA, etc.), UVM, VCS, Incisive, Scripting skills a + (Python, Perl, ...) Experience: Bachelor's Degreeand a minimum of 12+ years of related experience Additional Job Description: Compensation and Benefits The annual base salary range for this position is $141,000- $225,000 This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements. Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence. Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence. Similar Jobs (5)

ASIC Verification Engineer locations USA-CA San Jose Innovation Drive time type Full time posted on Posted 8 Days Ago IC Design Engineer locations 2 Locations time type Full time posted on Posted 14 Days Ago IC Design Engineer locations USA-CA San Jose Innovation Drive time type Full time posted on Posted 14 Days Ago Welcome! Thank you for your interest in Broadcom! We are a global technology leader that designs, develops and supplies a broad range of semiconductor and infrastructure software solutions.

#J-18808-Ljbffr

Nice-to-have skills

  • VCS
  • Python
  • Perl
  • California, United States

Work experience

  • Embedded

Languages

  • English
Other similar jobs

Senior ASIC Timing Engineer

@ NVIDIA, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

Senior ASIC Timing Engineer

@ NVIDIA, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

CPU Physical Design Principal Engineer

@ Qualcomm, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

ASIC Analog Design Engineer - REF79515L

@ Continental, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

Staff Engineer, Digital IC Design

@ Marvell Technology, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

ASIC Design Verification Engineer, Annapurna Labs

@ Amazon, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

ASIC Design Verification Engineer, Annapurna Labs

@ Amazon, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

ASIC RTL Engineer, Annapurna Labs

@ Amazon, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

ASIC Physical Design Engineer, Annapurna Labs

@ Amazon, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

ASIC RTL Engineer, Annapurna Labs

@ Amazon, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

  • Employment

    โฑ๏ธŽ full-time

  • Experience

    ๐Ÿง™โ€โ™‚๏ธ senior

  • Salary

    ๐Ÿ’ฐ 141000

  • Skills
  • Industry
  • Find similar jobs

    Senior ASIC Timing Engineer

    @ NVIDIA, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    Senior ASIC Timing Engineer

    @ NVIDIA, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    CPU Physical Design Principal Engineer

    @ Qualcomm, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    ASIC Analog Design Engineer - REF79515L

    @ Continental, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    Staff Engineer, Digital IC Design

    @ Marvell Technology, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    ASIC Design Verification Engineer, Annapurna Labs

    @ Amazon, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    ASIC Design Verification Engineer, Annapurna Labs

    @ Amazon, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    ASIC RTL Engineer, Annapurna Labs

    @ Amazon, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    ASIC Physical Design Engineer, Annapurna Labs

    @ Amazon, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

    ASIC RTL Engineer, Annapurna Labs

    @ Amazon, ๐Ÿ“United States ๐Ÿ‡บ๐Ÿ‡ธ

Remote Work
Post time
Level
Employment
Industry
Apply Now โ†—