Vibrancify
๐San Jose, United States ๐บ๐ธ
โฑ๏ธ full-time
๐งโโ๏ธ mid-level
on-site
Company Description
Vibrancify Technology Inc. is a leading semiconductor design services and staffing solutions provider, helping businesses transform and grow in the digital age. We specialize in building elite engineering teams and adopting intelligent workflows to accelerate time-to-silicon and innovation. Our offerings include semiconductor staffing services and design services, with deep domain expertise in semiconductors and EDA. With access to top-tier engineers and AI practitioners, we deliver flexible and high-quality services tailored to meet our clients' needs.
Role Description
This is a full-time on-site role for an ASIC Design Engineer, located in San Jose, CA. The ASIC Design Engineer will be responsible for day-to-day tasks such as logic design, RTL coding, design verification, and formal verification. The candidate will work closely with a team to develop, test, and optimize ASIC designs, ensuring high performance and reliability. This role demands attention to detail, problem-solving skills, and the ability to work effectively in a collaborative environment.
Qualifications
Senior Embedded Software Engineer
@ Embedd
At embedd.it, we power hardware-software integration in embedded devices. We turn fragmented semiconductor chip data into configurable digital twins, then deterministically generate code, tests, and documentation โ making integration faster, cheaper, and resilient to supply chain shocks.
Weโre looking for a true legend โ someone with abstract thinking and deep expertise in low-level software development. Youโll build vendor-agnostic tooling for MCU and peripheral integration to solve hardware-software integration once and for all. We work at the intersection of embedded systems, code generation, compilers, and machine learning. Itโs your chance to help redefine how low-level development is done.
embedd.it is a UK-based startup reinventing embedded development. Our platform transforms unstructured semiconductor data into structured digital twins, enabling automatic generation of drivers, tests, and documentation. We're building a single, traceable source of truth to make integration fast, vendor-agnostic, and future-proof.
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โฑ๏ธ full-time
๐งโโ๏ธ mid-level
on-site
Senior ASIC Timing Engineer
@ NVIDIA, ๐United States ๐บ๐ธ
Senior ASIC Timing Engineer
@ NVIDIA, ๐United States ๐บ๐ธ
CPU Physical Design Principal Engineer
@ Qualcomm, ๐United States ๐บ๐ธ
ASIC Analog Design Engineer - REF79515L
@ Continental, ๐United States ๐บ๐ธ
Staff Engineer, Digital IC Design
@ Marvell Technology, ๐United States ๐บ๐ธ
ASIC Design Verification Engineer, Annapurna Labs
@ Amazon, ๐United States ๐บ๐ธ
ASIC Design Verification Engineer, Annapurna Labs
@ Amazon, ๐United States ๐บ๐ธ
ASIC RTL Engineer, Annapurna Labs
@ Amazon, ๐United States ๐บ๐ธ
ASIC Physical Design Engineer, Annapurna Labs
@ Amazon, ๐United States ๐บ๐ธ
ASIC RTL Engineer, Annapurna Labs
@ Amazon, ๐United States ๐บ๐ธ